^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright(c) 2018 Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef TID_RDMA_DEFS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define TID_RDMA_DEFS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <rdma/ib_pack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct tid_rdma_read_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct ib_reth reth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) __be32 tid_flow_psn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) __be32 tid_flow_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct tid_rdma_read_resp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) __be32 aeth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) __be32 reserved[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __be32 verbs_psn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct tid_rdma_write_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct ib_reth reth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __be32 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct tid_rdma_write_resp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) __be32 aeth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) __be32 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) __be32 tid_flow_psn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __be32 tid_flow_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct tid_rdma_write_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) __be32 reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct tid_rdma_resync {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) __be32 reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct tid_rdma_ack {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) __le32 kdeth0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __le32 kdeth1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) __be32 aeth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __be32 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __be32 tid_flow_psn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) __be32 verbs_psn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) __be32 tid_flow_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) __be32 verbs_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * TID RDMA Opcodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define IB_OPCODE_TID_RDMA 0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) IB_OPCODE_WRITE_REQ = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) IB_OPCODE_WRITE_RESP = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) IB_OPCODE_WRITE_DATA = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) IB_OPCODE_WRITE_DATA_LAST = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) IB_OPCODE_READ_REQ = 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) IB_OPCODE_READ_RESP = 0x5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) IB_OPCODE_RESYNC = 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) IB_OPCODE_ACK = 0x7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) IB_OPCODE(TID_RDMA, WRITE_REQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) IB_OPCODE(TID_RDMA, WRITE_RESP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) IB_OPCODE(TID_RDMA, WRITE_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) IB_OPCODE(TID_RDMA, WRITE_DATA_LAST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) IB_OPCODE(TID_RDMA, READ_REQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) IB_OPCODE(TID_RDMA, READ_RESP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) IB_OPCODE(TID_RDMA, RESYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) IB_OPCODE(TID_RDMA, ACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define TID_OP(x) IB_OPCODE_TID_RDMA_##x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Define TID RDMA specific WR opcodes. The ib_wr_opcode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * enum already provides some reserved values for use by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * low level drivers. Two of those are used but renamed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * to be more descriptive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define IB_WR_TID_RDMA_WRITE IB_WR_RESERVED1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define IB_WR_TID_RDMA_READ IB_WR_RESERVED2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif /* TID_RDMA_DEFS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags