^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * cistpl.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * The initial developer of the original code is David A. Hinds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (C) 1999 David A. Hinds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef _LINUX_CISTPL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define _LINUX_CISTPL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) typedef unsigned char cisdata_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CISTPL_NULL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CISTPL_DEVICE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CISTPL_LONGLINK_CB 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CISTPL_INDIRECT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CISTPL_CONFIG_CB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CISTPL_CFTABLE_ENTRY_CB 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CISTPL_LONGLINK_MFC 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CISTPL_BAR 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define CISTPL_PWR_MGMNT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CISTPL_EXTDEVICE 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CISTPL_CHECKSUM 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CISTPL_LONGLINK_A 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CISTPL_LONGLINK_C 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define CISTPL_LINKTARGET 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CISTPL_NO_LINK 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CISTPL_VERS_1 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define CISTPL_ALTSTR 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CISTPL_DEVICE_A 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define CISTPL_JEDEC_C 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define CISTPL_JEDEC_A 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CISTPL_CONFIG 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define CISTPL_CFTABLE_ENTRY 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define CISTPL_DEVICE_OC 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define CISTPL_DEVICE_OA 0x1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define CISTPL_DEVICE_GEO 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define CISTPL_DEVICE_GEO_A 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define CISTPL_MANFID 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define CISTPL_FUNCID 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define CISTPL_FUNCE 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CISTPL_SWIL 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CISTPL_END 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Layer 2 tuples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CISTPL_VERS_2 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define CISTPL_FORMAT 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define CISTPL_GEOMETRY 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define CISTPL_BYTEORDER 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define CISTPL_DATE 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define CISTPL_BATTERY 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define CISTPL_FORMAT_A 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Layer 3 tuples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CISTPL_ORG 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CISTPL_SPCL 0x90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) typedef struct cistpl_longlink_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u_int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) } cistpl_longlink_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) typedef struct cistpl_checksum_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u_short addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u_short len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u_char sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) } cistpl_checksum_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CISTPL_MAX_FUNCTIONS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define CISTPL_MFC_ATTR 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CISTPL_MFC_COMMON 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) typedef struct cistpl_longlink_mfc_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u_char nfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u_char space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u_int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) } fn[CISTPL_MAX_FUNCTIONS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) } cistpl_longlink_mfc_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define CISTPL_MAX_ALTSTR_STRINGS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) typedef struct cistpl_altstr_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u_char ns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u_char ofs[CISTPL_MAX_ALTSTR_STRINGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) char str[254];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) } cistpl_altstr_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define CISTPL_DTYPE_NULL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define CISTPL_DTYPE_ROM 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define CISTPL_DTYPE_OTPROM 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define CISTPL_DTYPE_EPROM 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define CISTPL_DTYPE_EEPROM 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define CISTPL_DTYPE_FLASH 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define CISTPL_DTYPE_SRAM 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define CISTPL_DTYPE_DRAM 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define CISTPL_DTYPE_FUNCSPEC 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define CISTPL_DTYPE_EXTEND 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define CISTPL_MAX_DEVICES 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) typedef struct cistpl_device_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u_char ndev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u_char type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u_char wp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u_int speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u_int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } dev[CISTPL_MAX_DEVICES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } cistpl_device_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define CISTPL_DEVICE_MWAIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define CISTPL_DEVICE_3VCC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) typedef struct cistpl_device_o_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u_char flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) cistpl_device_t device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) } cistpl_device_o_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define CISTPL_VERS_1_MAX_PROD_STRINGS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) typedef struct cistpl_vers_1_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u_char major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u_char minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u_char ns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u_char ofs[CISTPL_VERS_1_MAX_PROD_STRINGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) char str[254];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) } cistpl_vers_1_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) typedef struct cistpl_jedec_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u_char nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) u_char mfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) u_char info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) } id[CISTPL_MAX_DEVICES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) } cistpl_jedec_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) typedef struct cistpl_manfid_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u_short manf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u_short card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) } cistpl_manfid_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define CISTPL_FUNCID_MULTI 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define CISTPL_FUNCID_MEMORY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define CISTPL_FUNCID_SERIAL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define CISTPL_FUNCID_PARALLEL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define CISTPL_FUNCID_FIXED 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define CISTPL_FUNCID_VIDEO 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define CISTPL_FUNCID_NETWORK 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define CISTPL_FUNCID_AIMS 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define CISTPL_FUNCID_SCSI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define CISTPL_SYSINIT_POST 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define CISTPL_SYSINIT_ROM 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) typedef struct cistpl_funcid_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u_char func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u_char sysinit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) } cistpl_funcid_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) typedef struct cistpl_funce_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u_char type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u_char data[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) } cistpl_funce_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*======================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) Modem Function Extension Tuples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ======================================================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define CISTPL_FUNCE_SERIAL_IF 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define CISTPL_FUNCE_SERIAL_CAP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define CISTPL_FUNCE_SERIAL_SERV_DATA 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define CISTPL_FUNCE_SERIAL_SERV_FAX 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define CISTPL_FUNCE_SERIAL_SERV_VOICE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define CISTPL_FUNCE_SERIAL_CAP_DATA 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define CISTPL_FUNCE_SERIAL_CAP_FAX 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define CISTPL_FUNCE_SERIAL_CAP_VOICE 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define CISTPL_FUNCE_SERIAL_IF_DATA 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define CISTPL_FUNCE_SERIAL_IF_FAX 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define CISTPL_FUNCE_SERIAL_IF_VOICE 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* UART identification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define CISTPL_SERIAL_UART_8250 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define CISTPL_SERIAL_UART_16450 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define CISTPL_SERIAL_UART_16550 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define CISTPL_SERIAL_UART_8251 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define CISTPL_SERIAL_UART_8530 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define CISTPL_SERIAL_UART_85230 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* UART capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define CISTPL_SERIAL_UART_SPACE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define CISTPL_SERIAL_UART_MARK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define CISTPL_SERIAL_UART_ODD 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define CISTPL_SERIAL_UART_EVEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define CISTPL_SERIAL_UART_5BIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define CISTPL_SERIAL_UART_6BIT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define CISTPL_SERIAL_UART_7BIT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define CISTPL_SERIAL_UART_8BIT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define CISTPL_SERIAL_UART_1STOP 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define CISTPL_SERIAL_UART_MSTOP 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define CISTPL_SERIAL_UART_2STOP 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) typedef struct cistpl_serial_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u_char uart_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u_char uart_cap_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u_char uart_cap_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) } cistpl_serial_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) typedef struct cistpl_modem_cap_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u_char flow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u_char cmd_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u_char rcv_buf_0, rcv_buf_1, rcv_buf_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u_char xmit_buf_0, xmit_buf_1, xmit_buf_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) } cistpl_modem_cap_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define CISTPL_SERIAL_MOD_103 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define CISTPL_SERIAL_MOD_V21 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define CISTPL_SERIAL_MOD_V23 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define CISTPL_SERIAL_MOD_V22 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define CISTPL_SERIAL_MOD_212A 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define CISTPL_SERIAL_MOD_V22BIS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define CISTPL_SERIAL_MOD_V26 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define CISTPL_SERIAL_MOD_V26BIS 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define CISTPL_SERIAL_MOD_V27BIS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define CISTPL_SERIAL_MOD_V29 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define CISTPL_SERIAL_MOD_V32 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define CISTPL_SERIAL_MOD_V32BIS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define CISTPL_SERIAL_MOD_V34 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define CISTPL_SERIAL_ERR_MNP2_4 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define CISTPL_SERIAL_ERR_V42_LAPM 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define CISTPL_SERIAL_CMPR_V42BIS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define CISTPL_SERIAL_CMPR_MNP5 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define CISTPL_SERIAL_CMD_AT1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define CISTPL_SERIAL_CMD_AT2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define CISTPL_SERIAL_CMD_AT3 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define CISTPL_SERIAL_CMD_MNP_AT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define CISTPL_SERIAL_CMD_V25BIS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define CISTPL_SERIAL_CMD_V25A 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define CISTPL_SERIAL_CMD_DMCL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) typedef struct cistpl_data_serv_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u_char max_data_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) u_char max_data_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u_char modulation_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u_char modulation_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u_char error_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u_char compression;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) u_char cmd_protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u_char escape;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u_char encrypt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u_char misc_features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u_char ccitt_code[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) } cistpl_data_serv_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) typedef struct cistpl_fax_serv_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u_char max_data_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u_char max_data_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u_char modulation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u_char encrypt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) u_char features_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u_char features_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u_char ccitt_code[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) } cistpl_fax_serv_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) typedef struct cistpl_voice_serv_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u_char max_data_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u_char max_data_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) } cistpl_voice_serv_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /*======================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) LAN Function Extension Tuples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ======================================================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define CISTPL_FUNCE_LAN_TECH 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define CISTPL_FUNCE_LAN_SPEED 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define CISTPL_FUNCE_LAN_MEDIA 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define CISTPL_FUNCE_LAN_NODE_ID 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define CISTPL_FUNCE_LAN_CONNECTOR 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* LAN technologies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define CISTPL_LAN_TECH_ARCNET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define CISTPL_LAN_TECH_ETHERNET 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define CISTPL_LAN_TECH_TOKENRING 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define CISTPL_LAN_TECH_LOCALTALK 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define CISTPL_LAN_TECH_FDDI 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define CISTPL_LAN_TECH_ATM 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define CISTPL_LAN_TECH_WIRELESS 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) typedef struct cistpl_lan_tech_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u_char tech;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) } cistpl_lan_tech_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) typedef struct cistpl_lan_speed_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) u_int speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } cistpl_lan_speed_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* LAN media definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define CISTPL_LAN_MEDIA_UTP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define CISTPL_LAN_MEDIA_STP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define CISTPL_LAN_MEDIA_THIN_COAX 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define CISTPL_LAN_MEDIA_THICK_COAX 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define CISTPL_LAN_MEDIA_FIBER 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define CISTPL_LAN_MEDIA_900MHZ 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define CISTPL_LAN_MEDIA_2GHZ 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define CISTPL_LAN_MEDIA_5GHZ 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define CISTPL_LAN_MEDIA_DIFF_IR 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define CISTPL_LAN_MEDIA_PTP_IR 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) typedef struct cistpl_lan_media_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) u_char media;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) } cistpl_lan_media_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) typedef struct cistpl_lan_node_id_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u_char nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u_char id[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) } cistpl_lan_node_id_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) typedef struct cistpl_lan_connector_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u_char code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) } cistpl_lan_connector_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /*======================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) IDE Function Extension Tuples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ======================================================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define CISTPL_IDE_INTERFACE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) typedef struct cistpl_ide_interface_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) u_char interface;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) } cistpl_ide_interface_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* First feature byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define CISTPL_IDE_SILICON 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define CISTPL_IDE_UNIQUE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define CISTPL_IDE_DUAL 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* Second feature byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define CISTPL_IDE_HAS_SLEEP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define CISTPL_IDE_HAS_STANDBY 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define CISTPL_IDE_HAS_IDLE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define CISTPL_IDE_LOW_POWER 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define CISTPL_IDE_REG_INHIBIT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define CISTPL_IDE_HAS_INDEX 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define CISTPL_IDE_IOIS16 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) typedef struct cistpl_ide_feature_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u_char feature1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u_char feature2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) } cistpl_ide_feature_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define CISTPL_FUNCE_IDE_IFACE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define CISTPL_FUNCE_IDE_MASTER 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define CISTPL_FUNCE_IDE_SLAVE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /*======================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) Configuration Table Entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ======================================================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #define CISTPL_BAR_SPACE 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define CISTPL_BAR_SPACE_IO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define CISTPL_BAR_PREFETCH 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define CISTPL_BAR_CACHEABLE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define CISTPL_BAR_1MEG_MAP 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) typedef struct cistpl_bar_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u_char attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u_int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) } cistpl_bar_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) typedef struct cistpl_config_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u_char last_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) u_int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) u_int rmask[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u_char subtuples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) } cistpl_config_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* These are bits in the 'present' field, and indices in 'param' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define CISTPL_POWER_VNOM 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define CISTPL_POWER_VMIN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define CISTPL_POWER_VMAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define CISTPL_POWER_ISTATIC 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define CISTPL_POWER_IAVG 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define CISTPL_POWER_IPEAK 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define CISTPL_POWER_IDOWN 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define CISTPL_POWER_HIGHZ_OK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define CISTPL_POWER_HIGHZ_REQ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) typedef struct cistpl_power_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u_char present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) u_char flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u_int param[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) } cistpl_power_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) typedef struct cistpl_timing_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u_int wait, waitscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u_int ready, rdyscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u_int reserved, rsvscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) } cistpl_timing_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define CISTPL_IO_LINES_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define CISTPL_IO_8BIT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define CISTPL_IO_16BIT 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define CISTPL_IO_RANGE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define CISTPL_IO_MAX_WIN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) typedef struct cistpl_io_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u_char flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) u_char nwin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u_int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u_int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) } win[CISTPL_IO_MAX_WIN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) } cistpl_io_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) typedef struct cistpl_irq_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) u_int IRQInfo1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u_int IRQInfo2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) } cistpl_irq_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define CISTPL_MEM_MAX_WIN 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) typedef struct cistpl_mem_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) u_char flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u_char nwin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u_int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u_int card_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) u_int host_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) } win[CISTPL_MEM_MAX_WIN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) } cistpl_mem_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define CISTPL_CFTABLE_DEFAULT 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define CISTPL_CFTABLE_BVDS 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define CISTPL_CFTABLE_WP 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define CISTPL_CFTABLE_RDYBSY 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define CISTPL_CFTABLE_MWAIT 0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define CISTPL_CFTABLE_AUDIO 0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define CISTPL_CFTABLE_READONLY 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define CISTPL_CFTABLE_PWRDOWN 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) typedef struct cistpl_cftable_entry_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) u_char index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) u_short flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) u_char interface;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) cistpl_power_t vcc, vpp1, vpp2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) cistpl_timing_t timing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) cistpl_io_t io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) cistpl_irq_t irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) cistpl_mem_t mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u_char subtuples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) } cistpl_cftable_entry_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define CISTPL_CFTABLE_MASTER 0x000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define CISTPL_CFTABLE_INVALIDATE 0x000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define CISTPL_CFTABLE_VGA_PALETTE 0x000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define CISTPL_CFTABLE_PARITY 0x000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define CISTPL_CFTABLE_WAIT 0x001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #define CISTPL_CFTABLE_SERR 0x002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) #define CISTPL_CFTABLE_FAST_BACK 0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) #define CISTPL_CFTABLE_BINARY_AUDIO 0x010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #define CISTPL_CFTABLE_PWM_AUDIO 0x020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) typedef struct cistpl_cftable_entry_cb_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u_char index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) u_int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) cistpl_power_t vcc, vpp1, vpp2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) u_char io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) cistpl_irq_t irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u_char mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) u_char subtuples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) } cistpl_cftable_entry_cb_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) typedef struct cistpl_device_geo_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) u_char ngeo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u_char buswidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u_int erase_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u_int read_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) u_int write_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) u_int partition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) u_int interleave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) } geo[CISTPL_MAX_DEVICES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) } cistpl_device_geo_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) typedef struct cistpl_vers_2_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) u_char vers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) u_char comply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) u_short dindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u_char vspec8, vspec9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) u_char nhdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) u_char vendor, info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) char str[244];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) } cistpl_vers_2_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) typedef struct cistpl_org_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) u_char data_org;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) char desc[30];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) } cistpl_org_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define CISTPL_ORG_FS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #define CISTPL_ORG_APPSPEC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) #define CISTPL_ORG_XIP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) typedef struct cistpl_format_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) u_char type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) u_char edc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) u_int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) u_int length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) } cistpl_format_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #define CISTPL_FORMAT_DISK 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) #define CISTPL_FORMAT_MEM 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) #define CISTPL_EDC_NONE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) #define CISTPL_EDC_CKSUM 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) #define CISTPL_EDC_CRC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #define CISTPL_EDC_PCC 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) typedef union cisparse_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) cistpl_device_t device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) cistpl_checksum_t checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) cistpl_longlink_t longlink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) cistpl_longlink_mfc_t longlink_mfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) cistpl_vers_1_t version_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) cistpl_altstr_t altstr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) cistpl_jedec_t jedec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) cistpl_manfid_t manfid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) cistpl_funcid_t funcid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) cistpl_funce_t funce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) cistpl_bar_t bar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) cistpl_config_t config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) cistpl_cftable_entry_t cftable_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) cistpl_cftable_entry_cb_t cftable_entry_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) cistpl_device_geo_t device_geo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) cistpl_vers_2_t vers_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) cistpl_org_t org;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) cistpl_format_t format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) } cisparse_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) typedef struct tuple_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) u_int Attributes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) cisdata_t DesiredTuple;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) u_int Flags; /* internal use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) u_int LinkOffset; /* internal use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) u_int CISOffset; /* internal use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) cisdata_t TupleCode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) cisdata_t TupleLink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) cisdata_t TupleOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) cisdata_t TupleDataMax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) cisdata_t TupleDataLen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) cisdata_t *TupleData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) } tuple_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* Special cisdata_t value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define RETURN_FIRST_TUPLE 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* Attributes for tuple calls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) #define TUPLE_RETURN_LINK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) #define TUPLE_RETURN_COMMON 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) #define CISTPL_MAX_CIS_SIZE 0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #endif /* LINUX_CISTPL_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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