^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright 2017 IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef _MISC_OCXL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define _MISC_OCXL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Opencapi drivers all need some common facilities, like parsing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * device configuration space, adding a Process Element to the Shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Process Area, etc...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The ocxl module provides a kernel API, to allow other drivers to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * reuse common code. A bit like a in-kernel library.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define OCXL_AFU_NAME_SZ (24+1) /* add 1 for NULL termination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct ocxl_afu_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u8 idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int dvsec_afu_control_pos; /* offset of AFU control DVSEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) char name[OCXL_AFU_NAME_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u8 version_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u8 version_minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 afuc_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 afum_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u8 profile;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u8 global_mmio_bar; /* global MMIO area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u64 global_mmio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 global_mmio_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 pp_mmio_bar; /* per-process MMIO area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u64 pp_mmio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 pp_mmio_stride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u64 lpc_mem_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u64 lpc_mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u64 special_purpose_mem_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u64 special_purpose_mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 pasid_supported_log;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u16 actag_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct ocxl_fn_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int dvsec_tl_pos; /* offset of the Transaction Layer DVSEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int dvsec_function_pos; /* offset of the Function DVSEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int dvsec_afu_info_pos; /* offset of the AFU information DVSEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) s8 max_pasid_log;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) s8 max_afu_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) enum ocxl_endian {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) // These are opaque outside the ocxl driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct ocxl_afu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct ocxl_fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct ocxl_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) // Device detection & initialisation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * ocxl_function_open() - Open an OpenCAPI function on an OpenCAPI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @dev: The PCI device that contains the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Returns an opaque pointer to the function, or an error pointer (check with IS_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct ocxl_fn *ocxl_function_open(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * ocxl_function_afu_list() - Get the list of AFUs associated with a PCI function device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Returns a list of struct ocxl_afu *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @fn: The OpenCAPI function containing the AFUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * ocxl_function_fetch_afu() - Fetch an AFU instance from an OpenCAPI function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @fn: The OpenCAPI function to get the AFU from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @afu_idx: The index of the AFU to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * If successful, the AFU should be released with ocxl_afu_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * Returns a pointer to the AFU, or NULL on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct ocxl_afu *ocxl_function_fetch_afu(struct ocxl_fn *fn, u8 afu_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * ocxl_afu_get() - Take a reference to an AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @afu: The AFU to increment the reference count on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) void ocxl_afu_get(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * ocxl_afu_put() - Release a reference to an AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @afu: The AFU to decrement the reference count on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) void ocxl_afu_put(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * ocxl_function_config() - Get the configuration information for an OpenCAPI function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @fn: The OpenCAPI function to get the config for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Returns the function config, or NULL on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) const struct ocxl_fn_config *ocxl_function_config(struct ocxl_fn *fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * ocxl_function_close() - Close an OpenCAPI function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * This will free any AFUs previously retrieved from the function, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * detach and associated contexts. The contexts must by freed by the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @fn: The OpenCAPI function to close
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) void ocxl_function_close(struct ocxl_fn *fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) // Context allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * ocxl_context_alloc() - Allocate an OpenCAPI context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @context: The OpenCAPI context to allocate, must be freed with ocxl_context_free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @afu: The AFU the context belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @mapping: The mapping to unmap when the context is closed (may be NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int ocxl_context_alloc(struct ocxl_context **context, struct ocxl_afu *afu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct address_space *mapping);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * ocxl_context_free() - Free an OpenCAPI context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @ctx: The OpenCAPI context to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) void ocxl_context_free(struct ocxl_context *ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * ocxl_context_attach() - Grant access to an MM to an OpenCAPI context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * @ctx: The OpenCAPI context to attach
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * @amr: The value of the AMR register to restrict access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * @mm: The mm to attach to the context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Returns 0 on success, negative on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int ocxl_context_attach(struct ocxl_context *ctx, u64 amr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct mm_struct *mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * ocxl_context_detach() - Detach an MM from an OpenCAPI context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @ctx: The OpenCAPI context to attach
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * Returns 0 on success, negative on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int ocxl_context_detach(struct ocxl_context *ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) // AFU IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * ocxl_afu_irq_alloc() - Allocate an IRQ associated with an AFU context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * @ctx: the AFU context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @irq_id: out, the IRQ ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * Returns 0 on success, negative on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * ocxl_afu_irq_free() - Frees an IRQ associated with an AFU context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @ctx: the AFU context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * @irq_id: the IRQ ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * Returns 0 on success, negative on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * ocxl_afu_irq_get_addr() - Gets the address of the trigger page for an IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * This can then be provided to an AFU which will write to that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * page to trigger the IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @ctx: The AFU context that the IRQ is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @irq_id: The IRQ ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * returns the trigger page address, or 0 if the IRQ is not valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * ocxl_irq_set_handler() - Provide a callback to be called when an IRQ is triggered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * @ctx: The AFU context that the IRQ is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * @irq_id: The IRQ ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * @handler: the callback to be called when the IRQ is triggered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @free_private: the callback to be called when the IRQ is freed (may be NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @private: Private data to be passed to the callbacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * Returns 0 on success, negative on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) irqreturn_t (*handler)(void *private),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) void (*free_private)(void *private),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) void *private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) // AFU Metadata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * ocxl_afu_config() - Get a pointer to the config for an AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * @afu: a pointer to the AFU to get the config for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Returns a pointer to the AFU config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct ocxl_afu_config *ocxl_afu_config(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * ocxl_afu_set_private() - Assign opaque hardware specific information to an OpenCAPI AFU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @afu: The OpenCAPI AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @private: the opaque hardware specific information to assign to the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) void ocxl_afu_set_private(struct ocxl_afu *afu, void *private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * ocxl_afu_get_private() - Fetch the hardware specific information associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * an external OpenCAPI AFU. This may be consumed by an external OpenCAPI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * @afu: The OpenCAPI AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * Returns the opaque pointer associated with the device, or NULL if not set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) void *ocxl_afu_get_private(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) // Global MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * ocxl_global_mmio_read32() - Read a 32 bit value from global MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @val: returns the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) enum ocxl_endian endian, u32 *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * ocxl_global_mmio_read64() - Read a 64 bit value from global MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * @val: returns the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) enum ocxl_endian endian, u64 *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * ocxl_global_mmio_write32() - Write a 32 bit value to global MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * @val: The value to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) enum ocxl_endian endian, u32 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * ocxl_global_mmio_write64() - Write a 64 bit value to global MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * @val: The value to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) enum ocxl_endian endian, u64 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * ocxl_global_mmio_set32() - Set bits in a 32 bit global MMIO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * @mask: a mask of the bits to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) enum ocxl_endian endian, u32 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * ocxl_global_mmio_set64() - Set bits in a 64 bit global MMIO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @mask: a mask of the bits to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) enum ocxl_endian endian, u64 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * ocxl_global_mmio_clear32() - Set bits in a 32 bit global MMIO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * @mask: a mask of the bits to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) enum ocxl_endian endian, u32 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * ocxl_global_mmio_clear64() - Set bits in a 64 bit global MMIO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * @afu: The AFU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @offset: The Offset from the start of MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * @endian: the endianness that the MMIO data is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * @mask: a mask of the bits to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * Returns 0 for success, negative on error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) enum ocxl_endian endian, u64 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) // Functions left here are for compatibility with the cxlflash driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * Read the configuration space of a function for the AFU specified by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * the index 'afu_idx'. Fills in a ocxl_afu_config structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) int ocxl_config_read_afu(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) struct ocxl_fn_config *fn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct ocxl_afu_config *afu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) u8 afu_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * Tell an AFU, by writing in the configuration space, the PASIDs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * it can use. Range starts at 'pasid_base' and its size is a multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * of 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * 'afu_control_offset' is the offset of the AFU control DVSEC which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * can be found in the function configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) void ocxl_config_set_afu_pasid(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int afu_control_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int pasid_base, u32 pasid_count_log);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * Get the actag configuration for the function:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * 'base' is the first actag value that can be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * 'enabled' it the number of actags available, starting from base.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * 'supported' is the total number of actags desired by all the AFUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * of the function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int ocxl_config_get_actag_info(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u16 *base, u16 *enabled, u16 *supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * Tell a function, by writing in the configuration space, the actags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * it can use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * 'func_offset' is the offset of the Function DVSEC that can found in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * the function configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u32 actag_base, u32 actag_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * Tell an AFU, by writing in the configuration space, the actags it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * can use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * 'afu_control_offset' is the offset of the AFU control DVSEC for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * desired AFU. It can be found in the AFU configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) void ocxl_config_set_afu_actag(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) int afu_control_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int actag_base, int actag_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * Enable/disable an AFU, by writing in the configuration space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * 'afu_control_offset' is the offset of the AFU control DVSEC for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * desired AFU. It can be found in the AFU configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) void ocxl_config_set_afu_state(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) int afu_control_offset, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * Set the Transaction Layer configuration in the configuration space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * Only needed for function 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * It queries the host TL capabilities, find some common ground
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * between the host and device, and set the Transaction Layer on both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * Request an AFU to terminate a PASID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * Will return once the AFU has acked the request, or an error in case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * of timeout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * The hardware can only terminate one PASID at a time, so caller must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * guarantee some kind of serialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * 'afu_control_offset' is the offset of the AFU control DVSEC for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * desired AFU. It can be found in the AFU configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int ocxl_config_terminate_pasid(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int afu_control_offset, int pasid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * Read the configuration space of a function and fill in a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * ocxl_fn_config structure with all the function details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) int ocxl_config_read_function(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct ocxl_fn_config *fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * Set up the opencapi link for the function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * When called for the first time for a link, it sets up the Shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * Process Area for the link and the interrupt handler to process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * translation faults.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) * Returns a 'link handle' that should be used for further calls for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * the link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) void **link_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * Remove the association between the function and its link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) void ocxl_link_release(struct pci_dev *dev, void *link_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * Add a Process Element to the Shared Process Area for a link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * The process is defined by its PASID, pid, tid and its mm_struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * 'xsl_err_cb' is an optional callback if the driver wants to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * notified when the translation fault interrupt handler detects an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * address error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * 'xsl_err_data' is an argument passed to the above callback, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u64 amr, struct mm_struct *mm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) void *xsl_err_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * Remove a Process Element from the Shared Process Area for a link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int ocxl_link_remove_pe(void *link_handle, int pasid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * Allocate an AFU interrupt associated to the link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * 'hw_irq' is the hardware interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int ocxl_link_irq_alloc(void *link_handle, int *hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * Free a previously allocated AFU interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) void ocxl_link_free_irq(void *link_handle, int hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #endif /* _MISC_OCXL_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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