Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * v4l2-dv-timings - Internal header with dv-timings helper functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __V4L2_DV_TIMINGS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __V4L2_DV_TIMINGS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * v4l2_calc_timeperframe - helper function to calculate timeperframe based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *	v4l2_dv_timings fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * @t: Timings for the video mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Calculates the expected timeperframe using the pixel clock value and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * horizontal/vertical measures. This means that v4l2_dv_timings structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * must be correctly and fully filled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct v4l2_fract v4l2_calc_timeperframe(const struct v4l2_dv_timings *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * v4l2_dv_timings_presets: list of all dv_timings presets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) extern const struct v4l2_dv_timings v4l2_dv_timings_presets[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * typedef v4l2_check_dv_timings_fnc - timings check callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @t: the v4l2_dv_timings struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * @handle: a handle from the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * Returns true if the given timings are valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) typedef bool v4l2_check_dv_timings_fnc(const struct v4l2_dv_timings *t, void *handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * v4l2_valid_dv_timings() - are these timings valid?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * @t:	  the v4l2_dv_timings struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * @cap: the v4l2_dv_timings_cap capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * @fnc: callback to check if this timing is OK. May be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * @fnc_handle: a handle that is passed on to @fnc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * Returns true if the given dv_timings struct is supported by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * hardware capabilities and the callback function (if non-NULL), returns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * false otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			   const struct v4l2_dv_timings_cap *cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 			   v4l2_check_dv_timings_fnc fnc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			   void *fnc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * v4l2_enum_dv_timings_cap() - Helper function to enumerate possible DV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  *	 timings based on capabilities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * @t:	  the v4l2_enum_dv_timings struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * @cap: the v4l2_dv_timings_cap capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * @fnc: callback to check if this timing is OK. May be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * @fnc_handle: a handle that is passed on to @fnc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * This enumerates dv_timings using the full list of possible CEA-861 and DMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * timings, filtering out any timings that are not supported based on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  * hardware capabilities and the callback function (if non-NULL).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * If a valid timing for the given index is found, it will fill in @t and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * return 0, otherwise it returns -EINVAL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			     const struct v4l2_dv_timings_cap *cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			     v4l2_check_dv_timings_fnc fnc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			     void *fnc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * v4l2_find_dv_timings_cap() - Find the closest timings struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * @t:	  the v4l2_enum_dv_timings struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * @cap: the v4l2_dv_timings_cap capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * @pclock_delta: maximum delta between t->pixelclock and the timing struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  *		under consideration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * @fnc: callback to check if a given timings struct is OK. May be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * @fnc_handle: a handle that is passed on to @fnc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * This function tries to map the given timings to an entry in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * full list of possible CEA-861 and DMT timings, filtering out any timings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * that are not supported based on the hardware capabilities and the callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * function (if non-NULL).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * On success it will fill in @t with the found timings and it returns true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * On failure it will return false.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			      const struct v4l2_dv_timings_cap *cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			      unsigned pclock_delta,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			      v4l2_check_dv_timings_fnc fnc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			      void *fnc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)  * v4l2_find_dv_timings_cea861_vic() - find timings based on CEA-861 VIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)  * @t:		the timings data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  * @vic:	CEA-861 VIC code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  * On success it will fill in @t with the found timings and it returns true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  * On failure it will return false.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) bool v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings *t, u8 vic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * v4l2_match_dv_timings() - do two timings match?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  * @measured:	  the measured timings data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  * @standard:	  the timings according to the standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  * @pclock_delta: maximum delta in Hz between standard->pixelclock and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  *		the measured timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * @match_reduced_fps: if true, then fail if V4L2_DV_FL_REDUCED_FPS does not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  * match.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * Returns true if the two timings match, returns false otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bool v4l2_match_dv_timings(const struct v4l2_dv_timings *measured,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			   const struct v4l2_dv_timings *standard,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			   unsigned pclock_delta, bool match_reduced_fps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  * v4l2_print_dv_timings() - log the contents of a dv_timings struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  * @dev_prefix:device prefix for each log line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  * @prefix:	additional prefix for each log line, may be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  * @t:		the timings data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  * @detailed:	if true, give a detailed log.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			   const struct v4l2_dv_timings *t, bool detailed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * v4l2_detect_cvt - detect if the given timings follow the CVT standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)  * @frame_height: the total height of the frame (including blanking) in lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)  * @hfreq: the horizontal frequency in Hz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)  * @vsync: the height of the vertical sync in lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)  * @active_width: active width of image (does not include blanking). This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)  * information is needed only in case of version 2 of reduced blanking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)  * In other cases, this parameter does not have any effect on timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  * @polarities: the horizontal and vertical polarities (same as struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  *		v4l2_bt_timings polarities).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  * @interlaced: if this flag is true, it indicates interlaced format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  * @fmt: the resulting timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)  * This function will attempt to detect if the given values correspond to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)  * valid CVT format. If so, then it will return true, and fmt will be filled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)  * in with the found CVT timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		unsigned active_width, u32 polarities, bool interlaced,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		struct v4l2_dv_timings *fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)  * v4l2_detect_gtf - detect if the given timings follow the GTF standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * @frame_height: the total height of the frame (including blanking) in lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * @hfreq: the horizontal frequency in Hz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  * @vsync: the height of the vertical sync in lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  * @polarities: the horizontal and vertical polarities (same as struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  *		v4l2_bt_timings polarities).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * @interlaced: if this flag is true, it indicates interlaced format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  * @aspect: preferred aspect ratio. GTF has no method of determining the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  *		aspect ratio in order to derive the image width from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  *		image height, so it has to be passed explicitly. Usually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  *		the native screen aspect ratio is used for this. If it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  *		is not filled in correctly, then 16:9 will be assumed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  * @fmt: the resulting timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  * This function will attempt to detect if the given values correspond to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  * valid GTF format. If so, then it will return true, and fmt will be filled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)  * in with the found GTF timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) bool v4l2_detect_gtf(unsigned frame_height, unsigned hfreq, unsigned vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		u32 polarities, bool interlaced, struct v4l2_fract aspect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		struct v4l2_dv_timings *fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)  * v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)  *	0x15 and 0x16 from the EDID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  * @hor_landscape: byte 0x15 from the EDID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  * @vert_portrait: byte 0x16 from the EDID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  * Determines the aspect ratio from the EDID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  * "Horizontal and Vertical Screen Size or Aspect Ratio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)  * v4l2_dv_timings_aspect_ratio - calculate the aspect ratio based on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  *	v4l2_dv_timings information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  * @t: the timings data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct v4l2_fract v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)  * can_reduce_fps - check if conditions for reduced fps are true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)  * @bt: v4l2 timing structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)  * For different timings reduced fps is allowed if the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)  * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)  *   - For CVT timings: if reduced blanking v2 (vsync == 8) is true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)  *   - For CEA861 timings: if %V4L2_DV_FL_CAN_REDUCE_FPS flag is true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static inline  bool can_reduce_fps(struct v4l2_bt_timings *bt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	if ((bt->standards & V4L2_DV_BT_STD_CVT) && (bt->vsync == 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if ((bt->standards & V4L2_DV_BT_STD_CEA861) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	    (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)  * struct v4l2_hdmi_rx_colorimetry - describes the HDMI colorimetry information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  * @colorspace:		enum v4l2_colorspace, the colorspace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)  * @ycbcr_enc:		enum v4l2_ycbcr_encoding, Y'CbCr encoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)  * @quantization:	enum v4l2_quantization, colorspace quantization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)  * @xfer_func:		enum v4l2_xfer_func, colorspace transfer function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct v4l2_hdmi_colorimetry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	enum v4l2_colorspace colorspace;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	enum v4l2_ycbcr_encoding ycbcr_enc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	enum v4l2_quantization quantization;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	enum v4l2_xfer_func xfer_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct hdmi_avi_infoframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct hdmi_vendor_infoframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct v4l2_hdmi_colorimetry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) v4l2_hdmi_rx_colorimetry(const struct hdmi_avi_infoframe *avi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			 const struct hdmi_vendor_infoframe *hdmi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			 unsigned int height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u16 v4l2_get_edid_phys_addr(const u8 *edid, unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			    unsigned int *offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) void v4l2_set_edid_phys_addr(u8 *edid, unsigned int size, u16 phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u16 v4l2_phys_addr_for_input(u16 phys_addr, u8 input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int v4l2_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #endif