^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * rc-map.h - define RC map names used by RC drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2010 by Mauro Carvalho Chehab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _MEDIA_RC_MAP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _MEDIA_RC_MAP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <uapi/linux/lirc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RC_PROTO_BIT_NONE 0ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RC_PROTO_BIT_UNKNOWN BIT_ULL(RC_PROTO_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RC_PROTO_BIT_OTHER BIT_ULL(RC_PROTO_OTHER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RC_PROTO_BIT_RC5 BIT_ULL(RC_PROTO_RC5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RC_PROTO_BIT_RC5X_20 BIT_ULL(RC_PROTO_RC5X_20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RC_PROTO_BIT_RC5_SZ BIT_ULL(RC_PROTO_RC5_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RC_PROTO_BIT_JVC BIT_ULL(RC_PROTO_JVC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RC_PROTO_BIT_SONY12 BIT_ULL(RC_PROTO_SONY12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RC_PROTO_BIT_SONY15 BIT_ULL(RC_PROTO_SONY15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RC_PROTO_BIT_SONY20 BIT_ULL(RC_PROTO_SONY20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RC_PROTO_BIT_NEC BIT_ULL(RC_PROTO_NEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RC_PROTO_BIT_NECX BIT_ULL(RC_PROTO_NECX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RC_PROTO_BIT_NEC32 BIT_ULL(RC_PROTO_NEC32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RC_PROTO_BIT_SANYO BIT_ULL(RC_PROTO_SANYO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RC_PROTO_BIT_MCIR2_KBD BIT_ULL(RC_PROTO_MCIR2_KBD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RC_PROTO_BIT_MCIR2_MSE BIT_ULL(RC_PROTO_MCIR2_MSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RC_PROTO_BIT_RC6_0 BIT_ULL(RC_PROTO_RC6_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RC_PROTO_BIT_RC6_6A_20 BIT_ULL(RC_PROTO_RC6_6A_20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RC_PROTO_BIT_RC6_6A_24 BIT_ULL(RC_PROTO_RC6_6A_24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RC_PROTO_BIT_RC6_6A_32 BIT_ULL(RC_PROTO_RC6_6A_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RC_PROTO_BIT_RC6_MCE BIT_ULL(RC_PROTO_RC6_MCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RC_PROTO_BIT_SHARP BIT_ULL(RC_PROTO_SHARP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RC_PROTO_BIT_XMP BIT_ULL(RC_PROTO_XMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RC_PROTO_BIT_CEC BIT_ULL(RC_PROTO_CEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RC_PROTO_BIT_IMON BIT_ULL(RC_PROTO_IMON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RC_PROTO_BIT_RCMM12 BIT_ULL(RC_PROTO_RCMM12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RC_PROTO_BIT_RCMM24 BIT_ULL(RC_PROTO_RCMM24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RC_PROTO_BIT_RCMM32 BIT_ULL(RC_PROTO_RCMM32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RC_PROTO_BIT_XBOX_DVD BIT_ULL(RC_PROTO_XBOX_DVD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #if IS_ENABLED(CONFIG_IR_RC5_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define __RC_PROTO_RC5_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | RC_PROTO_BIT_RC5_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define __RC_PROTO_RC5_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #if IS_ENABLED(CONFIG_IR_JVC_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define __RC_PROTO_JVC_CODEC RC_PROTO_BIT_JVC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define __RC_PROTO_JVC_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #if IS_ENABLED(CONFIG_IR_SONY_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define __RC_PROTO_SONY_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) (RC_PROTO_BIT_SONY12 | RC_PROTO_BIT_SONY15 | RC_PROTO_BIT_SONY20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define __RC_PROTO_SONY_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #if IS_ENABLED(CONFIG_IR_NEC_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define __RC_PROTO_NEC_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) (RC_PROTO_BIT_NEC | RC_PROTO_BIT_NECX | RC_PROTO_BIT_NEC32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define __RC_PROTO_NEC_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #if IS_ENABLED(CONFIG_IR_SANYO_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define __RC_PROTO_SANYO_CODEC RC_PROTO_BIT_SANYO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define __RC_PROTO_SANYO_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #if IS_ENABLED(CONFIG_IR_MCE_KBD_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define __RC_PROTO_MCE_KBD_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) (RC_PROTO_BIT_MCIR2_KBD | RC_PROTO_BIT_MCIR2_MSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define __RC_PROTO_MCE_KBD_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #if IS_ENABLED(CONFIG_IR_RC6_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define __RC_PROTO_RC6_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) (RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) RC_PROTO_BIT_RC6_MCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define __RC_PROTO_RC6_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #if IS_ENABLED(CONFIG_IR_SHARP_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define __RC_PROTO_SHARP_CODEC RC_PROTO_BIT_SHARP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define __RC_PROTO_SHARP_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #if IS_ENABLED(CONFIG_IR_XMP_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define __RC_PROTO_XMP_CODEC RC_PROTO_BIT_XMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define __RC_PROTO_XMP_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #if IS_ENABLED(CONFIG_IR_IMON_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define __RC_PROTO_IMON_CODEC RC_PROTO_BIT_IMON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define __RC_PROTO_IMON_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #if IS_ENABLED(CONFIG_IR_RCMM_DECODER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define __RC_PROTO_RCMM_CODEC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) (RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | RC_PROTO_BIT_RCMM32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define __RC_PROTO_RCMM_CODEC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* All kernel-based codecs have encoders and decoders */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define RC_PROTO_BIT_ALL_IR_DECODER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) (__RC_PROTO_RC5_CODEC | __RC_PROTO_JVC_CODEC | __RC_PROTO_SONY_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) __RC_PROTO_NEC_CODEC | __RC_PROTO_SANYO_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) __RC_PROTO_MCE_KBD_CODEC | __RC_PROTO_RC6_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) __RC_PROTO_SHARP_CODEC | __RC_PROTO_XMP_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) __RC_PROTO_IMON_CODEC | __RC_PROTO_RCMM_CODEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define RC_PROTO_BIT_ALL_IR_ENCODER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) (__RC_PROTO_RC5_CODEC | __RC_PROTO_JVC_CODEC | __RC_PROTO_SONY_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) __RC_PROTO_NEC_CODEC | __RC_PROTO_SANYO_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) __RC_PROTO_MCE_KBD_CODEC | __RC_PROTO_RC6_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) __RC_PROTO_SHARP_CODEC | __RC_PROTO_XMP_CODEC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) __RC_PROTO_IMON_CODEC | __RC_PROTO_RCMM_CODEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define RC_SCANCODE_UNKNOWN(x) (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define RC_SCANCODE_OTHER(x) (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define RC_SCANCODE_NEC(addr, cmd) (((addr) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define RC_SCANCODE_NECX(addr, cmd) (((addr) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define RC_SCANCODE_NEC32(data) ((data) & 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define RC_SCANCODE_RC5(sys, cmd) (((sys) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define RC_SCANCODE_RC5_SZ(sys, cmd) (((sys) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define RC_SCANCODE_RC6_0(sys, cmd) (((sys) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define RC_SCANCODE_RC6_6A(vendor, sys, cmd) (((vendor) << 16) | ((sys) << 8) | (cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * struct rc_map_table - represents a scancode/keycode pair
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * @scancode: scan code (u64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * @keycode: Linux input keycode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct rc_map_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u64 scancode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u32 keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * struct rc_map - represents a keycode map table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * @scan: pointer to struct &rc_map_table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * @size: Max number of entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * @len: Number of entries that are in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * @alloc: size of \*scan, in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @rc_proto: type of the remote controller protocol, as defined at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * enum &rc_proto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @name: name of the key map table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @lock: lock to protect access to this structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct rc_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct rc_map_table *scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) enum rc_proto rc_proto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * struct rc_map_list - list of the registered &rc_map maps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @list: pointer to struct &list_head
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @map: pointer to struct &rc_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct rc_map_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct rc_map map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #ifdef CONFIG_MEDIA_CEC_RC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * rc_map_list from rc-cec.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) extern struct rc_map_list cec_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Routines from rc-map.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * rc_map_register() - Registers a Remote Controller scancode map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * @map: pointer to struct rc_map_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int rc_map_register(struct rc_map_list *map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * rc_map_unregister() - Unregisters a Remote Controller scancode map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @map: pointer to struct rc_map_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) void rc_map_unregister(struct rc_map_list *map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * rc_map_get - gets an RC map from its name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * @name: name of the RC scancode map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct rc_map *rc_map_get(const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Names of the several keytables defined in-kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define RC_MAP_ADSTECH_DVB_T_PCI "rc-adstech-dvb-t-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define RC_MAP_ALINK_DTU_M "rc-alink-dtu-m"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define RC_MAP_ANYSEE "rc-anysee"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define RC_MAP_APAC_VIEWCOMP "rc-apac-viewcomp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define RC_MAP_ASTROMETA_T2HYBRID "rc-astrometa-t2hybrid"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define RC_MAP_ASUS_PC39 "rc-asus-pc39"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define RC_MAP_ASUS_PS3_100 "rc-asus-ps3-100"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define RC_MAP_ATI_TV_WONDER_HD_600 "rc-ati-tv-wonder-hd-600"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define RC_MAP_ATI_X10 "rc-ati-x10"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define RC_MAP_AVERMEDIA "rc-avermedia"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define RC_MAP_AVERMEDIA_A16D "rc-avermedia-a16d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define RC_MAP_AVERMEDIA_CARDBUS "rc-avermedia-cardbus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define RC_MAP_AVERMEDIA_DVBT "rc-avermedia-dvbt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define RC_MAP_AVERMEDIA_M135A "rc-avermedia-m135a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define RC_MAP_AVERMEDIA_M733A_RM_K6 "rc-avermedia-m733a-rm-k6"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define RC_MAP_AVERMEDIA_RM_KS "rc-avermedia-rm-ks"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define RC_MAP_AVERTV_303 "rc-avertv-303"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define RC_MAP_AZUREWAVE_AD_TU700 "rc-azurewave-ad-tu700"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define RC_MAP_BEELINK_GS1 "rc-beelink-gs1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define RC_MAP_BEHOLD "rc-behold"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define RC_MAP_BEHOLD_COLUMBUS "rc-behold-columbus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define RC_MAP_BUDGET_CI_OLD "rc-budget-ci-old"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define RC_MAP_CEC "rc-cec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define RC_MAP_CINERGY "rc-cinergy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define RC_MAP_CINERGY_1400 "rc-cinergy-1400"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define RC_MAP_D680_DMB "rc-d680-dmb"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define RC_MAP_DELOCK_61959 "rc-delock-61959"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define RC_MAP_DIB0700_NEC_TABLE "rc-dib0700-nec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define RC_MAP_DIB0700_RC5_TABLE "rc-dib0700-rc5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define RC_MAP_DIGITALNOW_TINYTWIN "rc-digitalnow-tinytwin"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define RC_MAP_DIGITTRADE "rc-digittrade"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define RC_MAP_DM1105_NEC "rc-dm1105-nec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define RC_MAP_DTT200U "rc-dtt200u"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define RC_MAP_DVBSKY "rc-dvbsky"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define RC_MAP_DVICO_MCE "rc-dvico-mce"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define RC_MAP_DVICO_PORTABLE "rc-dvico-portable"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define RC_MAP_EMPTY "rc-empty"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define RC_MAP_EM_TERRATEC "rc-em-terratec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define RC_MAP_ENCORE_ENLTV "rc-encore-enltv"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define RC_MAP_ENCORE_ENLTV_FM53 "rc-encore-enltv-fm53"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define RC_MAP_EVGA_INDTUBE "rc-evga-indtube"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define RC_MAP_EZTV "rc-eztv"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define RC_MAP_FLYDVB "rc-flydvb"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define RC_MAP_FLYVIDEO "rc-flyvideo"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define RC_MAP_FUSIONHDTV_MCE "rc-fusionhdtv-mce"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define RC_MAP_GADMEI_RM008Z "rc-gadmei-rm008z"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define RC_MAP_GEEKBOX "rc-geekbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define RC_MAP_GENIUS_TVGO_A11MCE "rc-genius-tvgo-a11mce"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define RC_MAP_GOTVIEW7135 "rc-gotview7135"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define RC_MAP_HAUPPAUGE "rc-hauppauge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define RC_MAP_HAUPPAUGE_NEW "rc-hauppauge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define RC_MAP_HISI_POPLAR "rc-hisi-poplar"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define RC_MAP_HISI_TV_DEMO "rc-hisi-tv-demo"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define RC_MAP_IMON_MCE "rc-imon-mce"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define RC_MAP_IMON_PAD "rc-imon-pad"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define RC_MAP_IMON_RSC "rc-imon-rsc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define RC_MAP_IODATA_BCTV7E "rc-iodata-bctv7e"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define RC_MAP_IT913X_V1 "rc-it913x-v1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define RC_MAP_IT913X_V2 "rc-it913x-v2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define RC_MAP_KAIOMY "rc-kaiomy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define RC_MAP_KHADAS "rc-khadas"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define RC_MAP_KWORLD_315U "rc-kworld-315u"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define RC_MAP_KWORLD_PC150U "rc-kworld-pc150u"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define RC_MAP_KWORLD_PLUS_TV_ANALOG "rc-kworld-plus-tv-analog"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define RC_MAP_LEADTEK_Y04G0051 "rc-leadtek-y04g0051"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define RC_MAP_LME2510 "rc-lme2510"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define RC_MAP_MANLI "rc-manli"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define RC_MAP_MEDION_X10 "rc-medion-x10"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define RC_MAP_MEDION_X10_DIGITAINER "rc-medion-x10-digitainer"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define RC_MAP_MEDION_X10_OR2X "rc-medion-x10-or2x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define RC_MAP_MSI_DIGIVOX_II "rc-msi-digivox-ii"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define RC_MAP_MSI_DIGIVOX_III "rc-msi-digivox-iii"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define RC_MAP_MSI_TVANYWHERE "rc-msi-tvanywhere"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define RC_MAP_MSI_TVANYWHERE_PLUS "rc-msi-tvanywhere-plus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define RC_MAP_NEBULA "rc-nebula"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define RC_MAP_NEC_TERRATEC_CINERGY_XS "rc-nec-terratec-cinergy-xs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define RC_MAP_NORWOOD "rc-norwood"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define RC_MAP_NPGTECH "rc-npgtech"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define RC_MAP_ODROID "rc-odroid"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define RC_MAP_PCTV_SEDNA "rc-pctv-sedna"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define RC_MAP_PIXELVIEW "rc-pixelview"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define RC_MAP_PIXELVIEW_002T "rc-pixelview-002t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define RC_MAP_PIXELVIEW_MK12 "rc-pixelview-mk12"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define RC_MAP_PIXELVIEW_NEW "rc-pixelview-new"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define RC_MAP_POWERCOLOR_REAL_ANGEL "rc-powercolor-real-angel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define RC_MAP_PROTEUS_2309 "rc-proteus-2309"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define RC_MAP_PURPLETV "rc-purpletv"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define RC_MAP_PV951 "rc-pv951"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define RC_MAP_RC5_TV "rc-rc5-tv"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define RC_MAP_RC6_MCE "rc-rc6-mce"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define RC_MAP_REAL_AUDIO_220_32_KEYS "rc-real-audio-220-32-keys"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define RC_MAP_REDDO "rc-reddo"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define RC_MAP_SNAPSTREAM_FIREFLY "rc-snapstream-firefly"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define RC_MAP_STREAMZAP "rc-streamzap"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define RC_MAP_SU3000 "rc-su3000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define RC_MAP_TANGO "rc-tango"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define RC_MAP_TANIX_TX3MINI "rc-tanix-tx3mini"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define RC_MAP_TANIX_TX5MAX "rc-tanix-tx5max"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define RC_MAP_TBS_NEC "rc-tbs-nec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define RC_MAP_TECHNISAT_TS35 "rc-technisat-ts35"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define RC_MAP_TECHNISAT_USB2 "rc-technisat-usb2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define RC_MAP_TERRATEC_CINERGY_C_PCI "rc-terratec-cinergy-c-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define RC_MAP_TERRATEC_CINERGY_S2_HD "rc-terratec-cinergy-s2-hd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define RC_MAP_TERRATEC_CINERGY_XS "rc-terratec-cinergy-xs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define RC_MAP_TERRATEC_SLIM "rc-terratec-slim"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define RC_MAP_TERRATEC_SLIM_2 "rc-terratec-slim-2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define RC_MAP_TEVII_NEC "rc-tevii-nec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define RC_MAP_TIVO "rc-tivo"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define RC_MAP_TOTAL_MEDIA_IN_HAND "rc-total-media-in-hand"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define RC_MAP_TOTAL_MEDIA_IN_HAND_02 "rc-total-media-in-hand-02"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define RC_MAP_TREKSTOR "rc-trekstor"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define RC_MAP_TT_1500 "rc-tt-1500"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define RC_MAP_VEGA_S9X "rc-vega-s9x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define RC_MAP_KII_PRO "rc-videostrong-kii-pro"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define RC_MAP_WETEK_HUB "rc-wetek-hub"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define RC_MAP_WETEK_PLAY2 "rc-wetek-play2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define RC_MAP_WINFAST "rc-winfast"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define RC_MAP_X96MAX "rc-x96max"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define RC_MAP_XBOX_DVD "rc-xbox-dvd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define RC_MAP_ZX_IRDEC "rc-zx-irdec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * Please, do not just append newer Remote Controller names at the end.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * The names should be ordered in alphabetical order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #endif /* _MEDIA_RC_MAP_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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