^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/media/video/tvp514x.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Texas Instruments Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Vaibhav Hiremath <hvaibhav@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Contributors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Sivaraj R <sivaraj@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Brijesh R Jadav <brijesh.j@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Hardik Shah <hardik.shah@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Manjunath Hadli <mrh@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Karicheri Muralidharan <m-karicheri2@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifndef _TVP514X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define _TVP514X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Other macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TVP514X_MODULE_NAME "tvp514x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TVP514X_XCLK_BT656 (27000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Number of pixels and number of lines per frame for different standards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define NTSC_NUM_ACTIVE_PIXELS (720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define NTSC_NUM_ACTIVE_LINES (480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PAL_NUM_ACTIVE_PIXELS (720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PAL_NUM_ACTIVE_LINES (576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * enum tvp514x_input - enum for different decoder input pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) enum tvp514x_input {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * CVBS input selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) INPUT_CVBS_VI1A = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) INPUT_CVBS_VI1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) INPUT_CVBS_VI1C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) INPUT_CVBS_VI2A = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) INPUT_CVBS_VI2B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) INPUT_CVBS_VI2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) INPUT_CVBS_VI3A = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) INPUT_CVBS_VI3B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) INPUT_CVBS_VI3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) INPUT_CVBS_VI4A = 0x0C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * S-Video input selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) INPUT_SVIDEO_VI2A_VI1A = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) INPUT_SVIDEO_VI2B_VI1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) INPUT_SVIDEO_VI2C_VI1C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) INPUT_SVIDEO_VI2A_VI3A = 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) INPUT_SVIDEO_VI2B_VI3B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) INPUT_SVIDEO_VI2C_VI3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) INPUT_SVIDEO_VI4A_VI1A = 0x4C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) INPUT_SVIDEO_VI4A_VI1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) INPUT_SVIDEO_VI4A_VI1C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) INPUT_SVIDEO_VI4A_VI3A = 0x5C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) INPUT_SVIDEO_VI4A_VI3B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) INPUT_SVIDEO_VI4A_VI3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Need to add entries for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * RGB, YPbPr and SCART.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) INPUT_INVALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * enum tvp514x_output - enum for output format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum tvp514x_output {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) OUTPUT_10BIT_422_EMBEDDED_SYNC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) OUTPUT_20BIT_422_SEPERATE_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) OUTPUT_10BIT_422_SEPERATE_SYNC = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) OUTPUT_INVALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * struct tvp514x_platform_data - Platform data values and access functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * @clk_polarity: Clock polarity of the current interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @hs_polarity: HSYNC Polarity configuration for current interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @vs_polarity: VSYNC Polarity configuration for current interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct tvp514x_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Interface control params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) bool clk_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) bool hs_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) bool vs_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #endif /* ifndef _TVP514X_H */