^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * ADV7343 header file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is distributed .as is. WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifndef ADV7343_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ADV7343_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ADV7343_COMPOSITE_ID (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ADV7343_COMPONENT_ID (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ADV7343_SVIDEO_ID (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * adv7343_power_mode - power mode configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @sleep_mode: on enable the current consumption is reduced to micro ampere
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * level. All DACs and the internal PLL circuit are disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Registers can be read from and written in sleep mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @pll_control: PLL and oversampling control. This control allows internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * PLL 1 circuit to be powered down and the oversampling to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * switched off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @dac: array to configure power on/off DAC's 1..6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * section of datasheet[1], table 17 page no 30.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * [1] http://www.analog.com/static/imported-files/data_sheets/ADV7342_7343.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct adv7343_power_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) bool sleep_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) bool pll_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 dac[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * struct adv7343_sd_config - SD Only Output Configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @sd_dac_out: array configuring SD DAC Outputs 1 and 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct adv7343_sd_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* SD only Output Configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 sd_dac_out[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * struct adv7343_platform_data - Platform data values and access functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @mode_config: Configuration for power mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @sd_config: SD Only Configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct adv7343_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct adv7343_power_mode mode_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct adv7343_sd_config sd_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #endif /* End of #ifndef ADV7343_H */