Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * adv7183.h - definition for adv7183 inputs and outputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2011 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef _ADV7183_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define _ADV7183_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* ADV7183 HW inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define ADV7183_COMPOSITE0  0  /* CVBS in on AIN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define ADV7183_COMPOSITE1  1  /* CVBS in on AIN2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define ADV7183_COMPOSITE2  2  /* CVBS in on AIN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ADV7183_COMPOSITE3  3  /* CVBS in on AIN4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ADV7183_COMPOSITE4  4  /* CVBS in on AIN5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ADV7183_COMPOSITE5  5  /* CVBS in on AIN6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ADV7183_COMPOSITE6  6  /* CVBS in on AIN7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ADV7183_COMPOSITE7  7  /* CVBS in on AIN8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ADV7183_COMPOSITE8  8  /* CVBS in on AIN9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ADV7183_COMPOSITE9  9  /* CVBS in on AIN10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ADV7183_COMPOSITE10 10 /* CVBS in on AIN11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ADV7183_SVIDEO0     11 /* Y on AIN1, C on AIN4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ADV7183_SVIDEO1     12 /* Y on AIN2, C on AIN5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ADV7183_SVIDEO2     13 /* Y on AIN3, C on AIN6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ADV7183_COMPONENT0  14 /* Y on AIN1, Pr on AIN4, Pb on AIN5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ADV7183_COMPONENT1  15 /* Y on AIN2, Pr on AIN3, Pb on AIN6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* ADV7183 HW outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ADV7183_8BIT_OUT    0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ADV7183_16BIT_OUT   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif