^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2008-2009 Texas Instruments Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * isif header file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _ISIF_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _ISIF_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <media/davinci/ccdc_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <media/davinci/vpfe_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* isif float type S8Q8/U8Q8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct isif_float_8 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* 8 bit integer part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) __u8 integer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* 8 bit decimal part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) __u8 decimal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* isif float type U16Q16/S16Q16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct isif_float_16 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* 16 bit integer part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) __u16 integer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* 16 bit decimal part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __u16 decimal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Vertical Defect Correction parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ***********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Defect Correction (DFC) table entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct isif_vdfc_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* vertical position of defect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) __u16 pos_vert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* horizontal position of defect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) __u16 pos_horz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Defect level of Vertical line defect position. This is subtracted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * from the data at the defect position
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) __u8 level_at_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Defect level of the pixels upper than the vertical line defect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This is subtracted from the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __u8 level_up_pixels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Defect level of the pixels lower than the vertical line defect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * This is subtracted from the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __u8 level_low_pixels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ISIF_VDFC_TABLE_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct isif_dfc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* enable vertical defect correction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) __u8 en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Defect level subtraction. Just fed through if saturating */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ISIF_VDFC_NORMAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * if data saturating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define ISIF_VDFC_HORZ_INTERPOL_IF_SAT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Horizontal interpolation (((i-2)+(i+2))/2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define ISIF_VDFC_HORZ_INTERPOL 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* one of the vertical defect correction modes above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) __u8 corr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* 0 - whole line corrected, 1 - not pixels upper than the defect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) __u8 corr_whole_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define ISIF_VDFC_NO_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define ISIF_VDFC_SHIFT_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ISIF_VDFC_SHIFT_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define ISIF_VDFC_SHIFT_3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define ISIF_VDFC_SHIFT_4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * defect level shift value. level_at_pos, level_upper_pos,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * and level_lower_pos can be shifted up by this value. Choose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * one of the values above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) __u8 def_level_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* defect saturation level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) __u16 def_sat_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* number of vertical defects. Max is ISIF_VDFC_TABLE_SIZE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) __u16 num_vdefects;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* VDFC table ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct isif_vdfc_entry table[ISIF_VDFC_TABLE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct isif_horz_bclamp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Horizontal clamp disabled. Only vertical clamp value is subtracted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ISIF_HORZ_BC_DISABLE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Horizontal clamp value is calculated and subtracted from image data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * along with vertical clamp value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define ISIF_HORZ_BC_CLAMP_CALC_ENABLED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * Horizontal clamp value calculated from previous image is subtracted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * from image data along with vertical clamp value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define ISIF_HORZ_BC_CLAMP_NOT_UPDATED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* horizontal clamp mode. One of the values above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) __u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * pixel value limit enable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * 0 - limit disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * 1 - pixel value limited to 1023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) __u8 clamp_pix_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Select Most left window for bc calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define ISIF_SEL_MOST_LEFT_WIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Select Most right window for bc calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define ISIF_SEL_MOST_RIGHT_WIN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Select most left or right window for clamp val calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __u8 base_win_sel_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Window count per color for calculation. range 1-32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) __u8 win_count_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Window start position - horizontal for calculation. 0 - 8191 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) __u16 win_start_h_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Window start position - vertical for calculation 0 - 8191 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) __u16 win_start_v_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define ISIF_HORZ_BC_SZ_H_2PIXELS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define ISIF_HORZ_BC_SZ_H_4PIXELS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define ISIF_HORZ_BC_SZ_H_8PIXELS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define ISIF_HORZ_BC_SZ_H_16PIXELS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Width of the sample window in pixels for calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) __u8 win_h_sz_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define ISIF_HORZ_BC_SZ_V_32PIXELS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define ISIF_HORZ_BC_SZ_V_64PIXELS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define ISIF_HORZ_BC_SZ_V_128PIXELS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define ISIF_HORZ_BC_SZ_V_256PIXELS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* Height of the sample window in pixels for calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) __u8 win_v_sz_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * Black Clamp parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ***********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct isif_vert_bclamp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* Reset value used is the clamp value calculated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define ISIF_VERT_BC_USE_HORZ_CLAMP_VAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Reset value used is reset_clamp_val configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* No update, previous image value is used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define ISIF_VERT_BC_NO_UPDATE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * Reset value selector for vertical clamp calculation. Use one of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * the above values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __u8 reset_val_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* U8Q8. Line average coefficient used in vertical clamp calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) __u8 line_ave_coef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* Height of the optical black region for calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) __u16 ob_v_sz_calc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* Optical black region start position - horizontal. 0 - 8191 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) __u16 ob_start_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Optical black region start position - vertical 0 - 8191 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) __u16 ob_start_v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct isif_black_clamp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * This offset value is added irrespective of the clamp enable status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * S13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) __u16 dc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Enable black/digital clamp value to be subtracted from the image data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) __u8 en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * black clamp mode. same/separate clamp for 4 colors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * 0 - disable - same clamp value for all colors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * 1 - clamp value calculated separately for all colors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) __u8 bc_mode_color;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Vrtical start position for bc subtraction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) __u16 vert_start_sub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* Black clamp for horizontal direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct isif_horz_bclamp horz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* Black clamp for vertical direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct isif_vert_bclamp vert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ** Color Space Conversion (CSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define ISIF_CSC_NUM_COEFF 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct isif_color_space_conv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* Enable color space conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) __u8 en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * csc coeffient table. S8Q5, M00 at index 0, M01 at index 1, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * so forth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct isif_float_8 coeff[ISIF_CSC_NUM_COEFF];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ** Black Compensation parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct isif_black_comp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Comp for Red */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) __s8 r_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* Comp for Gr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) __s8 gr_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Comp for Blue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) __s8 b_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* Comp for Gb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) __s8 gb_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ** Gain parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct isif_gain {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Gain for Red or ye */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct isif_float_16 r_ye;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* Gain for Gr or cy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct isif_float_16 gr_cy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* Gain for Gb or g */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct isif_float_16 gb_g;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* Gain for Blue or mg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct isif_float_16 b_mg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define ISIF_LINEAR_TAB_SIZE 192
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ** Linearization parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct isif_linearize {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Enable or Disable linearization of data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) __u8 en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* Shift value applied */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) __u8 corr_shft;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* scale factor applied U11Q10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct isif_float_16 scale_fact;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* Size of the linear table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) __u16 table[ISIF_LINEAR_TAB_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* Color patterns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define ISIF_RED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define ISIF_GREEN_RED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define ISIF_GREEN_BLUE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define ISIF_BLUE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct isif_col_pat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) __u8 olop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) __u8 olep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) __u8 elop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) __u8 elep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ** Data formatter parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct isif_fmtplen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * number of program entries for SET0, range 1 - 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * ISIF_COMBINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) __u16 plen0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * number of program entries for SET1, range 1 - 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * ISIF_COMBINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) __u16 plen1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * number of program entries for SET2, range 1 - 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * ISIF_COMBINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) __u16 plen2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * number of program entries for SET3, range 1 - 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * ISIF_COMBINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) __u16 plen3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct isif_fmt_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define ISIF_SPLIT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define ISIF_COMBINE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* Split or combine or line alternate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) __u8 fmtmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* enable or disable line alternating mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) __u8 ln_alter_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define ISIF_1LINE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define ISIF_2LINES 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define ISIF_3LINES 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define ISIF_4LINES 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* Split/combine line number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) __u8 lnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* Address increment Range 1 - 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) __u8 addrinc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct isif_fmt_addr_ptr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* Initial address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) __u32 init_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* output line number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define ISIF_1STLINE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define ISIF_2NDLINE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define ISIF_3RDLINE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define ISIF_4THLINE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) __u8 out_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct isif_fmtpgm_ap {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* program address pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) __u8 pgm_aptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* program address increment or decrement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) __u8 pgmupdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct isif_data_formatter {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* Enable/Disable data formatter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) __u8 en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* data formatter configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct isif_fmt_cfg cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Formatter program entries length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct isif_fmtplen plen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* first pixel in a line fed to formatter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) __u16 fmtrlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* HD interval for output line. Only valid when split line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) __u16 fmthcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* formatter address pointers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct isif_fmt_addr_ptr fmtaddr_ptr[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* program enable/disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) __u8 pgm_en[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* program address pointers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct isif_fmtpgm_ap fmtpgm_ap[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct isif_df_csc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Color Space Conversion confguration, 0 - csc, 1 - df */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) __u8 df_or_csc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* csc configuration valid if df_or_csc is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct isif_color_space_conv csc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* data formatter configuration valid if df_or_csc is 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct isif_data_formatter df;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* start pixel in a line at the input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) __u32 start_pix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* number of pixels in input line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) __u32 num_pixels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* start line at the input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) __u32 start_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* number of lines at the input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) __u32 num_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct isif_gain_offsets_adj {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* Gain adjustment per color */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct isif_gain gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* Offset adjustment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) __u16 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /* Enable or Disable Gain adjustment for SDRAM data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) __u8 gain_sdram_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* Enable or Disable Gain adjustment for IPIPE data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) __u8 gain_ipipe_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* Enable or Disable Gain adjustment for H3A data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) __u8 gain_h3a_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* Enable or Disable Gain adjustment for SDRAM data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) __u8 offset_sdram_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* Enable or Disable Gain adjustment for IPIPE data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) __u8 offset_ipipe_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* Enable or Disable Gain adjustment for H3A data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) __u8 offset_h3a_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct isif_cul {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* Horizontal Cull pattern for odd lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) __u8 hcpat_odd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Horizontal Cull pattern for even lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) __u8 hcpat_even;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* Vertical Cull pattern */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) __u8 vcpat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Enable or disable lpf. Apply when cull is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) __u8 en_lpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct isif_compress {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define ISIF_ALAW 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define ISIF_DPCM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define ISIF_NO_COMPRESSION 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* Compression Algorithm used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) __u8 alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Choose Predictor1 for DPCM compression */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define ISIF_DPCM_PRED1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* Choose Predictor2 for DPCM compression */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define ISIF_DPCM_PRED2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /* Predictor for DPCM compression */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) __u8 pred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* all the stuff in this struct will be provided by userland */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct isif_config_params_raw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /* Linearization parameters for image sensor data input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct isif_linearize linearize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* Data formatter or CSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct isif_df_csc df_csc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* Defect Pixel Correction (DFC) confguration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct isif_dfc dfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /* Black/Digital Clamp configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct isif_black_clamp bclamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* Gain, offset adjustments */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct isif_gain_offsets_adj gain_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* Culling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct isif_cul culling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* A-Law and DPCM compression options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) struct isif_compress compress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* horizontal offset for Gain/LSC/DFC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) __u16 horz_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /* vertical offset for Gain/LSC/DFC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) __u16 vert_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /* color pattern for field 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct isif_col_pat col_pat_field0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /* color pattern for field 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct isif_col_pat col_pat_field1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define ISIF_NO_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #define ISIF_1BIT_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define ISIF_2BIT_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define ISIF_3BIT_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define ISIF_4BIT_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define ISIF_5BIT_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define ISIF_6BIT_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* Data shift applied before storing to SDRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) __u8 data_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* enable input test pattern generation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) __u8 test_pat_gen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct isif_ycbcr_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* isif pixel format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) enum ccdc_pixfmt pix_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* isif frame format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) enum ccdc_frmfmt frm_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* ISIF crop window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct v4l2_rect win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* field polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) enum vpfe_pin_pol fid_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* interface VD polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) enum vpfe_pin_pol vd_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /* interface HD polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) enum vpfe_pin_pol hd_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* isif pix order. Only used for ycbcr capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) enum ccdc_pixorder pix_order;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* isif buffer type. Only used for ycbcr capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) enum ccdc_buftype buf_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* MSB of image data connected to sensor port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) enum isif_data_msb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ISIF_BIT_MSB_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) ISIF_BIT_MSB_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ISIF_BIT_MSB_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) ISIF_BIT_MSB_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ISIF_BIT_MSB_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ISIF_BIT_MSB_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ISIF_BIT_MSB_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) ISIF_BIT_MSB_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) ISIF_BIT_MSB_7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) enum isif_cfa_pattern {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ISIF_CFA_PAT_MOSAIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) ISIF_CFA_PAT_STRIPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) struct isif_params_raw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /* isif pixel format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) enum ccdc_pixfmt pix_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* isif frame format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) enum ccdc_frmfmt frm_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /* video window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct v4l2_rect win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) /* field polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) enum vpfe_pin_pol fid_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* interface VD polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) enum vpfe_pin_pol vd_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) /* interface HD polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) enum vpfe_pin_pol hd_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* buffer type. Applicable for interlaced mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) enum ccdc_buftype buf_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* Gain values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct isif_gain gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /* cfa pattern */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) enum isif_cfa_pattern cfa_pat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /* Data MSB position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) enum isif_data_msb data_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /* Enable horizontal flip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) unsigned char horz_flip_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* Enable image invert vertically */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) unsigned char image_invert_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* all the userland defined stuff*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct isif_config_params_raw config_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) enum isif_data_pack {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ISIF_PACK_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ISIF_PACK_12BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ISIF_PACK_8BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define ISIF_WIN_NTSC {0, 0, 720, 480}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #define ISIF_WIN_VGA {0, 0, 640, 480}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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