^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Header providing constants for Rockchip suspend bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018, Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: XiaoDong.Huang
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __DT_BINDINGS_ROCKCHIP_PM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __DT_BINDINGS_ROCKCHIP_PM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /******************************bits ops************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define BIT(nr) (1 << (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RKPM_SLP_CTR_VOL_PWM0 BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RKPM_SLP_CTR_VOL_PWM1 BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif