^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __DT_RT5640_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __DT_RT5640_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define RT5640_DMIC1_DATA_PIN_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define RT5640_DMIC1_DATA_PIN_IN1P 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define RT5640_DMIC1_DATA_PIN_GPIO3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define RT5640_DMIC2_DATA_PIN_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define RT5640_DMIC2_DATA_PIN_IN1N 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define RT5640_DMIC2_DATA_PIN_GPIO4 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define RT5640_JD_SRC_GPIO1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RT5640_JD_SRC_JD1_IN4P 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RT5640_JD_SRC_JD2_IN4N 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RT5640_JD_SRC_GPIO2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RT5640_JD_SRC_GPIO3 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RT5640_JD_SRC_GPIO4 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RT5640_OVCD_SF_0P5 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RT5640_OVCD_SF_0P75 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RT5640_OVCD_SF_1P0 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RT5640_OVCD_SF_1P5 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif /* __DT_RT5640_H */