^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __DT_MESON_AIU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __DT_MESON_AIU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define AIU_CPU 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define AIU_HDMI 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define AIU_ACODEC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define CPU_I2S_FIFO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CPU_SPDIF_FIFO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define CPU_I2S_ENCODER 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CPU_SPDIF_ENCODER 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CTRL_I2S 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CTRL_PCM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CTRL_OUT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #endif /* __DT_MESON_AIU_H */