Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __DT_CS35L32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __DT_CS35L32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #define CS35L32_BOOST_MGR_AUTO		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define CS35L32_BOOST_MGR_AUTO_AUDIO	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define CS35L32_BOOST_MGR_BYPASS	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define CS35L32_BOOST_MGR_FIXED		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CS35L32_DATA_CFG_LR_VP		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define CS35L32_DATA_CFG_LR_STAT	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CS35L32_DATA_CFG_LR		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CS35L32_DATA_CFG_LR_VPSTAT	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CS35L32_BATT_THRESH_3_1V	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CS35L32_BATT_THRESH_3_2V	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CS35L32_BATT_THRESH_3_3V	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CS35L32_BATT_THRESH_3_4V	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CS35L32_BATT_RECOV_3_1V		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CS35L32_BATT_RECOV_3_2V		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CS35L32_BATT_RECOV_3_3V		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CS35L32_BATT_RECOV_3_4V		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CS35L32_BATT_RECOV_3_5V		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define CS35L32_BATT_RECOV_3_6V		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #endif /* __DT_CS35L32_H */