Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _DT_BINDINGS_SOC_TEGRA_PMC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _DT_BINDINGS_SOC_TEGRA_PMC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define TEGRA_PMC_CLK_OUT_1		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define TEGRA_PMC_CLK_OUT_2		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TEGRA_PMC_CLK_OUT_3		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define TEGRA_PMC_CLK_BLINK		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TEGRA_PMC_CLK_MAX		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif	/* _DT_BINDINGS_SOC_TEGRA_PMC_H */