^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2016 Maxime Ripard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _RST_SUN5I_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _RST_SUN5I_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define RST_USB_PHY0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define RST_USB_PHY1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define RST_GPS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RST_DE_BE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RST_DE_FE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RST_TVE 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RST_LCD 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RST_CSI 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RST_VE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RST_GPU 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RST_IEP 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #endif /* _RST_SUN5I_H_ */