^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define RST_R_APB1_TIMER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define RST_R_APB1_TWD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define RST_R_APB1_PWM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define RST_R_APB2_UART 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define RST_R_APB2_I2C 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RST_R_APB1_IR 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RST_R_APB1_W1 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif /* _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ */