Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * This header provides constants for the reset controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * present in the Pistachio SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef _PISTACHIO_RESETS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define _PISTACHIO_RESETS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define PISTACHIO_RESET_I2C0		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PISTACHIO_RESET_I2C1		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PISTACHIO_RESET_I2C2		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PISTACHIO_RESET_I2C3		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PISTACHIO_RESET_I2S_IN		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PISTACHIO_RESET_PRL_OUT		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PISTACHIO_RESET_SPDIF_OUT	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PISTACHIO_RESET_SPI		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PISTACHIO_RESET_PWM_PDM		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PISTACHIO_RESET_UART0		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PISTACHIO_RESET_UART1		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PISTACHIO_RESET_QSPI		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PISTACHIO_RESET_MDC		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PISTACHIO_RESET_SDHOST		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PISTACHIO_RESET_ETHERNET	14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PISTACHIO_RESET_IR		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PISTACHIO_RESET_HASH		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PISTACHIO_RESET_TIMER		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PISTACHIO_RESET_I2S_OUT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PISTACHIO_RESET_SPDIF_IN	19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PISTACHIO_RESET_EVT		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PISTACHIO_RESET_USB_H		21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PISTACHIO_RESET_USB_PR		22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PISTACHIO_RESET_USB_PHY_PR	23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PISTACHIO_RESET_USB_PHY_PON	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PISTACHIO_RESET_MAX		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif