Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Baikal-T1 CCU reset indices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef __DT_BINDINGS_RESET_BT1_CCU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define __DT_BINDINGS_RESET_BT1_CCU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CCU_AXI_MAIN_RST		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define CCU_AXI_DDR_RST			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CCU_AXI_SATA_RST		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CCU_AXI_GMAC0_RST		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CCU_AXI_GMAC1_RST		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CCU_AXI_XGMAC_RST		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CCU_AXI_PCIE_M_RST		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CCU_AXI_PCIE_S_RST		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CCU_AXI_USB_RST			8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CCU_AXI_HWA_RST			9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CCU_AXI_SRAM_RST		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CCU_SYS_SATA_REF_RST		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CCU_SYS_APB_RST			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif /* __DT_BINDINGS_RESET_BT1_CCU_H */