^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __DT_BINDINGS_POWER_RK3128_POWER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __DT_BINDINGS_POWER_RK3128_POWER_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* VD_CORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define RK3128_PD_CORE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /* VD_LOGIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define RK3128_PD_VIO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define RK3128_PD_VIDEO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define RK3128_PD_GPU 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define RK3128_PD_MSCH 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #endif