Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Copyright (c) 2017 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Author: Mars.C <mars.cheng@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef _DT_BINDINGS_POWER_MT6797_POWER_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define _DT_BINDINGS_POWER_MT6797_POWER_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MT6797_POWER_DOMAIN_VDEC		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define MT6797_POWER_DOMAIN_VENC		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MT6797_POWER_DOMAIN_ISP		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MT6797_POWER_DOMAIN_MM			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MT6797_POWER_DOMAIN_AUDIO		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MT6797_POWER_DOMAIN_MFG_ASYNC		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MT6797_POWER_DOMAIN_MFG		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MT6797_POWER_DOMAIN_MFG_CORE0		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MT6797_POWER_DOMAIN_MFG_CORE1		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MT6797_POWER_DOMAIN_MFG_CORE2		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MT6797_POWER_DOMAIN_MFG_CORE3		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MT6797_POWER_DOMAIN_MJC		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */