^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Torgue Alexandre <alexandre.torgue@st.com> for STMicroelectronics.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _DT_BINDINGS_STM32_PINFUNC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _DT_BINDINGS_STM32_PINFUNC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* define PIN modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define GPIO 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define AF0 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define AF1 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define AF2 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define AF3 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AF4 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AF5 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AF6 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AF7 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AF8 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AF9 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AF10 0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AF11 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AF12 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AF13 0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AF14 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AF15 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ANALOG 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* define Pins number*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PIN_NO(port, line) (((port) - 'A') * 0x10 + (line))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* package information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define STM32MP_PKG_AA 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define STM32MP_PKG_AB 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define STM32MP_PKG_AC 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define STM32MP_PKG_AD 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif /* _DT_BINDINGS_STM32_PINFUNC_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)