Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Header providing constants for Rockchip pinctrl bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2013 MundoReader S.L.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Author: Heiko Stuebner <heiko@sntech.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifndef __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define RK_PA0		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define RK_PA1		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RK_PA2		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RK_PA3		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RK_PA4		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RK_PA5		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RK_PA6		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RK_PA7		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RK_PB0		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RK_PB1		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RK_PB2		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RK_PB3		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RK_PB4		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RK_PB5		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RK_PB6		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RK_PB7		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RK_PC0		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RK_PC1		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RK_PC2		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RK_PC3		19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RK_PC4		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RK_PC5		21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RK_PC6		22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RK_PC7		23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RK_PD0		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RK_PD1		25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RK_PD2		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RK_PD3		27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RK_PD4		28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RK_PD5		29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RK_PD6		30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RK_PD7		31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RK_FUNC_GPIO	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif