^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This header provides constants for the Qualcomm PMIC GPIO binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define PMIC_GPIO_PULL_UP_30 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define PMIC_GPIO_PULL_UP_1P5 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PMIC_GPIO_PULL_UP_31P5 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PMIC_GPIO_PULL_UP_1P5_30 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PMIC_GPIO_STRENGTH_NO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PMIC_GPIO_STRENGTH_HIGH 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PMIC_GPIO_STRENGTH_MED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PMIC_GPIO_STRENGTH_LOW 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Note: PM8018 GPIO3 and GPIO4 are supporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * only S3 and L2 options (1.8V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PM8018_GPIO_L6 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PM8018_GPIO_L5 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PM8018_GPIO_S3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PM8018_GPIO_L14 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PM8018_GPIO_L2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PM8018_GPIO_L4 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PM8018_GPIO_VDD 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Note: PM8038 GPIO7 and GPIO8 are supporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * only L11 and L4 options (1.8V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PM8038_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PM8038_GPIO_BB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PM8038_GPIO_L11 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PM8038_GPIO_L15 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PM8038_GPIO_L4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PM8038_GPIO_L3 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PM8038_GPIO_L17 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PM8058_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PM8058_GPIO_BB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PM8058_GPIO_S3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PM8058_GPIO_L3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PM8058_GPIO_L7 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PM8058_GPIO_L6 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PM8058_GPIO_L5 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PM8058_GPIO_L2 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Note: PM8916 GPIO1 and GPIO2 are supporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * only L2(1.15V) and L5(1.8V) options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PM8916_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PM8916_GPIO_L2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PM8916_GPIO_L5 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PM8917_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PM8917_GPIO_S4 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PM8917_GPIO_L15 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PM8917_GPIO_L4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PM8917_GPIO_L3 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PM8917_GPIO_L17 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define PM8921_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PM8921_GPIO_BB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define PM8921_GPIO_S4 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PM8921_GPIO_L15 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PM8921_GPIO_L4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PM8921_GPIO_L3 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define PM8921_GPIO_L17 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * Note: PM8941 gpios from 15 to 18 are supporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * only S3 and L6 options (1.8V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PM8941_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PM8941_GPIO_L1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define PM8941_GPIO_S3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define PM8941_GPIO_L6 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Note: PMA8084 gpios from 15 to 18 are supporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * only S4 and L6 options (1.8V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define PMA8084_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PMA8084_GPIO_L1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define PMA8084_GPIO_S4 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PMA8084_GPIO_L6 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define PM8994_GPIO_VPH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define PM8994_GPIO_S4 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define PM8994_GPIO_L12 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* To be used with "function" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PMIC_GPIO_FUNC_NORMAL "normal"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PMIC_GPIO_FUNC_PAIRED "paired"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define PMIC_GPIO_FUNC_FUNC1 "func1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define PMIC_GPIO_FUNC_FUNC2 "func2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define PMIC_GPIO_FUNC_FUNC3 "func3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define PMIC_GPIO_FUNC_FUNC4 "func4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PMIC_GPIO_FUNC_DTEST1 "dtest1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define PMIC_GPIO_FUNC_DTEST2 "dtest2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define PMIC_GPIO_FUNC_DTEST3 "dtest3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define PMIC_GPIO_FUNC_DTEST4 "dtest4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define PM8038_GPIO1_2_LPG_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define PM8038_GPIO3_5V_BOOST_EN PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define PM8038_GPIO4_SSBI_ALT_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define PM8038_GPIO5_6_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define PM8038_GPIO10_11_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define PM8038_GPIO6_7_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PM8038_GPIO9_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define PM8038_GPIO6_12_KYPD_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define PM8058_GPIO7_8_MP3_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define PM8058_GPIO7_8_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define PM8058_GPIO9_26_KYPD_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define PM8058_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define PM8058_GPIO24_26_LPG_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define PM8058_GPIO33_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define PM8058_GPIO34_35_MP3_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define PM8058_GPIO36_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define PM8058_GPIO37_UPL_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define PM8058_GPIO37_UART_M_RX PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define PM8058_GPIO38_XO_SLEEP_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define PM8058_GPIO38_39_CLK_32KHZ PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define PM8058_GPIO39_MP3_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define PM8058_GPIO40_EXT_BB_EN PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define PM8916_GPIO1_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define PM8916_GPIO1_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define PM8916_GPIO2_DIV_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define PM8916_GPIO2_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define PM8916_GPIO3_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define PM8916_GPIO4_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define PM8917_GPIO9_18_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define PM8917_GPIO20_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define PM8917_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define PM8917_GPIO25_26_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define PM8917_GPIO37_38_XO_SLEEP_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define PM8917_GPIO37_38_MP3_CLK PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define PM8941_GPIO9_14_KYPD_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define PM8941_GPIO15_18_DIV_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define PM8941_GPIO15_18_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define PM8941_GPIO23_26_KYPD_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define PM8941_GPIO23_26_LPG_DRV_HI PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define PM8941_GPIO31_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define PM8941_GPIO33_36_LPG_DRV_3D PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define PM8941_GPIO33_36_LPG_DRV_HI PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define PMA8084_GPIO4_5_LPG_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define PMA8084_GPIO7_10_LPG_DRV PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define PMA8084_GPIO5_14_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define PMA8084_GPIO19_21_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define PMA8084_GPIO15_18_DIV_CLK PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define PMA8084_GPIO15_18_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define PMA8084_GPIO22_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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