^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Philippe Peurichard <philippe.peurichard@st.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __DT_BINDINGS_STPMIC1_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __DT_BINDINGS_STPMIC1_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* IRQ definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define IT_PONKEY_F 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define IT_PONKEY_R 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define IT_WAKEUP_F 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define IT_WAKEUP_R 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define IT_VBUS_OTG_F 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define IT_VBUS_OTG_R 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define IT_SWOUT_F 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define IT_SWOUT_R 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define IT_CURLIM_BUCK1 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define IT_CURLIM_BUCK2 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define IT_CURLIM_BUCK3 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define IT_CURLIM_BUCK4 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IT_OCP_OTG 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define IT_OCP_SWOUT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define IT_OCP_BOOST 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define IT_OVP_BOOST 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define IT_CURLIM_LDO1 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IT_CURLIM_LDO2 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define IT_CURLIM_LDO3 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define IT_CURLIM_LDO4 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define IT_CURLIM_LDO5 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define IT_CURLIM_LDO6 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define IT_SHORT_SWOTG 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define IT_SHORT_SWOUT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define IT_TWARN_F 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define IT_TWARN_R 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define IT_VINLOW_F 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define IT_VINLOW_R 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IT_SWIN_F 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define IT_SWIN_R 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* BUCK MODES definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define STPMIC1_BUCK_MODE_NORMAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define STPMIC1_BUCK_MODE_LP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif /* __DT_BINDINGS_STPMIC1_H__ */