^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This header provides constants for the Qualcomm RPM bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DT_BINDINGS_MFD_QCOM_RPM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DT_BINDINGS_MFD_QCOM_RPM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Constants use to identify individual resources in the RPM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define QCOM_RPM_APPS_FABRIC_ARB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define QCOM_RPM_APPS_FABRIC_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define QCOM_RPM_APPS_FABRIC_HALT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define QCOM_RPM_APPS_FABRIC_IOCTL 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define QCOM_RPM_APPS_FABRIC_MODE 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define QCOM_RPM_APPS_L2_CACHE_CTL 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define QCOM_RPM_CFPB_CLK 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define QCOM_RPM_CXO_BUFFERS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define QCOM_RPM_CXO_CLK 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define QCOM_RPM_DAYTONA_FABRIC_CLK 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define QCOM_RPM_DDR_DMM 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define QCOM_RPM_EBI1_CLK 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define QCOM_RPM_HDMI_SWITCH 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define QCOM_RPM_MMFPB_CLK 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define QCOM_RPM_MM_FABRIC_ARB 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define QCOM_RPM_MM_FABRIC_CLK 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define QCOM_RPM_MM_FABRIC_HALT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define QCOM_RPM_MM_FABRIC_IOCTL 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define QCOM_RPM_MM_FABRIC_MODE 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define QCOM_RPM_PLL_4 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define QCOM_RPM_PM8058_LDO0 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define QCOM_RPM_PM8058_LDO1 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define QCOM_RPM_PM8058_LDO2 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define QCOM_RPM_PM8058_LDO3 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define QCOM_RPM_PM8058_LDO4 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define QCOM_RPM_PM8058_LDO5 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define QCOM_RPM_PM8058_LDO6 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define QCOM_RPM_PM8058_LDO7 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define QCOM_RPM_PM8058_LDO8 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define QCOM_RPM_PM8058_LDO9 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define QCOM_RPM_PM8058_LDO10 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define QCOM_RPM_PM8058_LDO11 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define QCOM_RPM_PM8058_LDO12 33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define QCOM_RPM_PM8058_LDO13 34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define QCOM_RPM_PM8058_LDO14 35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define QCOM_RPM_PM8058_LDO15 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define QCOM_RPM_PM8058_LDO16 37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define QCOM_RPM_PM8058_LDO17 38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define QCOM_RPM_PM8058_LDO18 39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define QCOM_RPM_PM8058_LDO19 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define QCOM_RPM_PM8058_LDO20 41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define QCOM_RPM_PM8058_LDO21 42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define QCOM_RPM_PM8058_LDO22 43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define QCOM_RPM_PM8058_LDO23 44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define QCOM_RPM_PM8058_LDO24 45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define QCOM_RPM_PM8058_LDO25 46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define QCOM_RPM_PM8058_LVS0 47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define QCOM_RPM_PM8058_LVS1 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define QCOM_RPM_PM8058_NCP 49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define QCOM_RPM_PM8058_SMPS0 50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define QCOM_RPM_PM8058_SMPS1 51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define QCOM_RPM_PM8058_SMPS2 52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define QCOM_RPM_PM8058_SMPS3 53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define QCOM_RPM_PM8058_SMPS4 54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define QCOM_RPM_PM8821_LDO1 55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define QCOM_RPM_PM8821_SMPS1 56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define QCOM_RPM_PM8821_SMPS2 57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define QCOM_RPM_PM8901_LDO0 58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define QCOM_RPM_PM8901_LDO1 59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define QCOM_RPM_PM8901_LDO2 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define QCOM_RPM_PM8901_LDO3 61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define QCOM_RPM_PM8901_LDO4 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define QCOM_RPM_PM8901_LDO5 63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define QCOM_RPM_PM8901_LDO6 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define QCOM_RPM_PM8901_LVS0 65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define QCOM_RPM_PM8901_LVS1 66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define QCOM_RPM_PM8901_LVS2 67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define QCOM_RPM_PM8901_LVS3 68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define QCOM_RPM_PM8901_MVS 69
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define QCOM_RPM_PM8901_SMPS0 70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define QCOM_RPM_PM8901_SMPS1 71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define QCOM_RPM_PM8901_SMPS2 72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define QCOM_RPM_PM8901_SMPS3 73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define QCOM_RPM_PM8901_SMPS4 74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define QCOM_RPM_PM8921_CLK1 75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define QCOM_RPM_PM8921_CLK2 76
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define QCOM_RPM_PM8921_LDO1 77
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define QCOM_RPM_PM8921_LDO2 78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define QCOM_RPM_PM8921_LDO3 79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define QCOM_RPM_PM8921_LDO4 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define QCOM_RPM_PM8921_LDO5 81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define QCOM_RPM_PM8921_LDO6 82
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define QCOM_RPM_PM8921_LDO7 83
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define QCOM_RPM_PM8921_LDO8 84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define QCOM_RPM_PM8921_LDO9 85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define QCOM_RPM_PM8921_LDO10 86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define QCOM_RPM_PM8921_LDO11 87
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define QCOM_RPM_PM8921_LDO12 88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define QCOM_RPM_PM8921_LDO13 89
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define QCOM_RPM_PM8921_LDO14 90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define QCOM_RPM_PM8921_LDO15 91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define QCOM_RPM_PM8921_LDO16 92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define QCOM_RPM_PM8921_LDO17 93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define QCOM_RPM_PM8921_LDO18 94
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define QCOM_RPM_PM8921_LDO19 95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define QCOM_RPM_PM8921_LDO20 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define QCOM_RPM_PM8921_LDO21 97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define QCOM_RPM_PM8921_LDO22 98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define QCOM_RPM_PM8921_LDO23 99
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define QCOM_RPM_PM8921_LDO24 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define QCOM_RPM_PM8921_LDO25 101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define QCOM_RPM_PM8921_LDO26 102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define QCOM_RPM_PM8921_LDO27 103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define QCOM_RPM_PM8921_LDO28 104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define QCOM_RPM_PM8921_LDO29 105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define QCOM_RPM_PM8921_LVS1 106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define QCOM_RPM_PM8921_LVS2 107
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define QCOM_RPM_PM8921_LVS3 108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define QCOM_RPM_PM8921_LVS4 109
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define QCOM_RPM_PM8921_LVS5 110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define QCOM_RPM_PM8921_LVS6 111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define QCOM_RPM_PM8921_LVS7 112
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define QCOM_RPM_PM8921_MVS 113
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define QCOM_RPM_PM8921_NCP 114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define QCOM_RPM_PM8921_SMPS1 115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define QCOM_RPM_PM8921_SMPS2 116
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define QCOM_RPM_PM8921_SMPS3 117
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define QCOM_RPM_PM8921_SMPS4 118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define QCOM_RPM_PM8921_SMPS5 119
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define QCOM_RPM_PM8921_SMPS6 120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define QCOM_RPM_PM8921_SMPS7 121
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define QCOM_RPM_PM8921_SMPS8 122
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define QCOM_RPM_PXO_CLK 123
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define QCOM_RPM_QDSS_CLK 124
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define QCOM_RPM_SFPB_CLK 125
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define QCOM_RPM_SMI_CLK 126
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define QCOM_RPM_SYS_FABRIC_ARB 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define QCOM_RPM_SYS_FABRIC_CLK 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define QCOM_RPM_SYS_FABRIC_HALT 129
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define QCOM_RPM_SYS_FABRIC_IOCTL 130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define QCOM_RPM_SYS_FABRIC_MODE 131
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define QCOM_RPM_USB_OTG_SWITCH 132
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define QCOM_RPM_VDDMIN_GPIO 133
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define QCOM_RPM_NSS_FABRIC_0_CLK 134
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define QCOM_RPM_NSS_FABRIC_1_CLK 135
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define QCOM_RPM_SMB208_S1a 136
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define QCOM_RPM_SMB208_S1b 137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define QCOM_RPM_SMB208_S2a 138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define QCOM_RPM_SMB208_S2b 139
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define QCOM_RPM_PM8018_SMPS1 140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define QCOM_RPM_PM8018_SMPS2 141
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define QCOM_RPM_PM8018_SMPS3 142
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define QCOM_RPM_PM8018_SMPS4 143
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define QCOM_RPM_PM8018_SMPS5 144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define QCOM_RPM_PM8018_LDO1 145
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define QCOM_RPM_PM8018_LDO2 146
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define QCOM_RPM_PM8018_LDO3 147
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define QCOM_RPM_PM8018_LDO4 148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define QCOM_RPM_PM8018_LDO5 149
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define QCOM_RPM_PM8018_LDO6 150
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define QCOM_RPM_PM8018_LDO7 151
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define QCOM_RPM_PM8018_LDO8 152
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define QCOM_RPM_PM8018_LDO9 153
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define QCOM_RPM_PM8018_LDO10 154
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define QCOM_RPM_PM8018_LDO11 155
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define QCOM_RPM_PM8018_LDO12 156
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define QCOM_RPM_PM8018_LDO13 157
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define QCOM_RPM_PM8018_LDO14 158
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define QCOM_RPM_PM8018_LVS1 159
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define QCOM_RPM_PM8018_NCP 160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define QCOM_RPM_VOLTAGE_CORNER 161
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * Constants used to select force mode for regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define QCOM_RPM_FORCE_MODE_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define QCOM_RPM_FORCE_MODE_LPM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define QCOM_RPM_FORCE_MODE_HPM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define QCOM_RPM_FORCE_MODE_AUTO 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define QCOM_RPM_FORCE_MODE_BYPASS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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