^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This header provides macros for Palmas device bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2013, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Laxman Dewangan <ldewangan@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __DT_BINDINGS_PALMAS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __DT_BINDINGS_PALMAS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* External control pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PALMAS_EXT_CONTROL_PIN_ENABLE1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PALMAS_EXT_CONTROL_PIN_ENABLE2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PALMAS_EXT_CONTROL_PIN_NSLEEP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif /* __DT_BINDINGS_PALMAS_H */