^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef DT_BINDINGS_MEMORY_TEGRA20_MC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define DT_BINDINGS_MEMORY_TEGRA20_MC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define TEGRA20_MC_RESET_AVPC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define TEGRA20_MC_RESET_DC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define TEGRA20_MC_RESET_DCB 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define TEGRA20_MC_RESET_EPP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define TEGRA20_MC_RESET_2D 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define TEGRA20_MC_RESET_HC 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TEGRA20_MC_RESET_ISP 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define TEGRA20_MC_RESET_MPCORE 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define TEGRA20_MC_RESET_MPEA 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TEGRA20_MC_RESET_MPEB 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TEGRA20_MC_RESET_MPEC 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TEGRA20_MC_RESET_3D 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TEGRA20_MC_RESET_PPCS 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TEGRA20_MC_RESET_VDE 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define TEGRA20_MC_RESET_VI 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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