^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This file is dual-licensed: you can use it either under the terms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * of the GPL or the X11 license, at your option. Note that this dual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * licensing only applies to this file, and not this project as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * whole.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * a) This library is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * published by the Free Software Foundation; either version 2 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * This library is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Or, alternatively,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * b) Permission is hereby granted, free of charge, to any person
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * obtaining a copy of this software and associated documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * files (the "Software"), to deal in the Software without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * restriction, including without limitation the rights to use,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * copy, modify, merge, publish, distribute, sublicense, and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Software is furnished to do so, subject to the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * The above copyright notice and this permission notice shall be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * included in all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BIT(nr) (1UL << (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DDR3_DS_34ohm BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DDR3_DS_40ohm (0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define LP2_DS_34ohm (0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LP2_DS_40ohm (0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LP2_DS_48ohm (0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define LP2_DS_60ohm (0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define LP2_DS_68_6ohm (0x5) /* optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define LP2_DS_80ohm (0x6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LP2_DS_120ohm (0x7) /* optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define DDR3_ODT_DIS (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define DDR3_ODT_40ohm (BIT(2) | BIT(6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define DDR3_ODT_60ohm BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define DDR3_ODT_120ohm BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PHY_RON_DISABLE (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PHY_RON_309ohm (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PHY_RON_155ohm (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define PHY_RON_103ohm (3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PHY_RON_77ohm (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define PHY_RON_63ohm (5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PHY_RON_52ohm (6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PHY_RON_45ohm (7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PHY_RON_62ohm (9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define PHY_RON_44ohm (11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define PHY_RON_39ohm (12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define PHY_RON_34ohm (13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PHY_RON_31ohm (14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PHY_RON_28ohm (15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PHY_RTT_DISABLE (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PHY_RTT_816ohm (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define PHY_RTT_431ohm (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define PHY_RTT_287ohm (3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define PHY_RTT_216ohm (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define PHY_RTT_172ohm (5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define PHY_RTT_145ohm (6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define PHY_RTT_124ohm (7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define PHY_RTT_215ohm (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define PHY_RTT_144ohm (10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PHY_RTT_123ohm (11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define PHY_RTT_108ohm (12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PHY_RTT_96ohm (13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define PHY_RTT_86ohm (14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define PHY_RTT_78ohm (15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #endif /* _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags