Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Interconnect framework driver for i.MX SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2019-2020, NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __DT_BINDINGS_INTERCONNECT_IMX8MN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define IMX8MN_ICN_NOC		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define IMX8MN_ICS_DRAM		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define IMX8MN_ICS_OCRAM	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define IMX8MN_ICM_A53		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define IMX8MN_ICM_GPU		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define IMX8MN_ICN_GPU		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define IMX8MN_ICM_CSI1		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define IMX8MN_ICM_CSI2		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define IMX8MN_ICM_ISI		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define IMX8MN_ICM_LCDIF	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define IMX8MN_ICN_MIPI		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IMX8MN_ICM_USB		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define IMX8MN_ICM_SDMA2	13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define IMX8MN_ICM_SDMA3	14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define IMX8MN_ICN_AUDIO	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IMX8MN_ICN_ENET		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define IMX8MN_ICM_ENET		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define IMX8MN_ICM_NAND		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define IMX8MN_ICM_SDMA1	19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define IMX8MN_ICM_USDHC1	20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define IMX8MN_ICM_USDHC2	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define IMX8MN_ICM_USDHC3	22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define IMX8MN_ICN_MAIN		23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MN_H */