^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef _DT_BINDINGS_ADI_AD5592R_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define _DT_BINDINGS_ADI_AD5592R_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define CH_MODE_UNUSED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define CH_MODE_ADC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define CH_MODE_DAC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define CH_MODE_DAC_AND_ADC 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CH_MODE_GPIO 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CH_OFFSTATE_PULLDOWN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CH_OFFSTATE_OUT_LOW 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CH_OFFSTATE_OUT_HIGH 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CH_OFFSTATE_OUT_TRISTATE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif /* _DT_BINDINGS_ADI_AD5592R_H */