^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * GPIO definitions for Amlogic Meson8b SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Endless Mobile, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Carlo Caione <carlo@endlessm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _DT_BINDINGS_MESON8B_GPIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _DT_BINDINGS_MESON8B_GPIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* EE (CBUS) GPIO chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define GPIOX_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define GPIOX_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GPIOX_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define GPIOX_3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define GPIOX_4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GPIOX_5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define GPIOX_6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define GPIOX_7 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GPIOX_8 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GPIOX_9 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define GPIOX_10 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define GPIOX_11 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define GPIOX_16 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GPIOX_17 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define GPIOX_18 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define GPIOX_19 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define GPIOX_20 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define GPIOX_21 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define GPIOY_0 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define GPIOY_1 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define GPIOY_3 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define GPIOY_6 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define GPIOY_7 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define GPIOY_8 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define GPIOY_9 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define GPIOY_10 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define GPIOY_11 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define GPIOY_12 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define GPIOY_13 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define GPIOY_14 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define GPIODV_9 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define GPIODV_24 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define GPIODV_25 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define GPIODV_26 33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define GPIODV_27 34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define GPIODV_28 35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GPIODV_29 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define GPIOH_0 37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define GPIOH_1 38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define GPIOH_2 39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define GPIOH_3 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define GPIOH_4 41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define GPIOH_5 42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define GPIOH_6 43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define GPIOH_7 44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define GPIOH_8 45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define GPIOH_9 46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define CARD_0 47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CARD_1 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define CARD_2 49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CARD_3 50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define CARD_4 51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define CARD_5 52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CARD_6 53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define BOOT_0 54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define BOOT_1 55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define BOOT_2 56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define BOOT_3 57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define BOOT_4 58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define BOOT_5 59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define BOOT_6 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define BOOT_7 61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define BOOT_8 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define BOOT_9 63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define BOOT_10 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define BOOT_11 65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define BOOT_12 66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BOOT_13 67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define BOOT_14 68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define BOOT_15 69
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define BOOT_16 70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define BOOT_17 71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define BOOT_18 72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define DIF_0_P 73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define DIF_0_N 74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define DIF_1_P 75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define DIF_1_N 76
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define DIF_2_P 77
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define DIF_2_N 78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define DIF_3_P 79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define DIF_3_N 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define DIF_4_P 81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define DIF_4_N 82
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* AO GPIO chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define GPIOAO_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GPIOAO_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GPIOAO_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define GPIOAO_3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define GPIOAO_4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define GPIOAO_5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define GPIOAO_6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define GPIOAO_7 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define GPIOAO_8 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define GPIOAO_9 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define GPIOAO_10 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define GPIOAO_11 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define GPIOAO_12 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define GPIOAO_13 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define GPIO_BSD_EN 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define GPIO_TEST_N 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #endif /* _DT_BINDINGS_MESON8B_GPIO_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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