^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __DT_BINDINGS_DMA_DW_DMAC_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Protection Control bits provide protection against illegal transactions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */