Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define CLK_AR100		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define CLK_R_APB1		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CLK_R_APB1_TIMER	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CLK_R_APB1_TWD		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CLK_R_APB1_PWM		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CLK_R_APB2_UART		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CLK_R_APB2_I2C		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CLK_R_APB1_IR		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CLK_R_APB1_W1		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CLK_IR			11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CLK_W1			12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */