^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2017, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __STRATIX10_CLOCK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __STRATIX10_CLOCK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /* fixed rate clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define STRATIX10_OSC1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define STRATIX10_CB_INTOSC_HS_DIV2_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define STRATIX10_CB_INTOSC_LS_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define STRATIX10_F2S_FREE_CLK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* fixed factor clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define STRATIX10_L4_SYS_FREE_CLK 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define STRATIX10_MPU_PERIPH_CLK 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STRATIX10_MPU_L2RAM_CLK 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define STRATIX10_SDMMC_CIU_CLK 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* PLL clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define STRATIX10_MAIN_PLL_CLK 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define STRATIX10_PERIPH_PLL_CLK 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define STRATIX10_BOOT_CLK 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Periph clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define STRATIX10_MAIN_MPU_BASE_CLK 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define STRATIX10_MAIN_NOC_BASE_CLK 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STRATIX10_MAIN_EMACA_CLK 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define STRATIX10_MAIN_EMACB_CLK 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define STRATIX10_MAIN_EMAC_PTP_CLK 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define STRATIX10_MAIN_GPIO_DB_CLK 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define STRATIX10_MAIN_SDMMC_CLK 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define STRATIX10_MAIN_S2F_USR0_CLK 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define STRATIX10_MAIN_S2F_USR1_CLK 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define STRATIX10_MAIN_PSI_REF_CLK 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define STRATIX10_PERI_MPU_BASE_CLK 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define STRATIX10_PERI_NOC_BASE_CLK 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STRATIX10_PERI_EMACA_CLK 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define STRATIX10_PERI_EMACB_CLK 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define STRATIX10_PERI_EMAC_PTP_CLK 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define STRATIX10_PERI_GPIO_DB_CLK 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define STRATIX10_PERI_SDMMC_CLK 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STRATIX10_PERI_S2F_USR0_CLK 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define STRATIX10_PERI_S2F_USR1_CLK 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define STRATIX10_PERI_PSI_REF_CLK 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define STRATIX10_MPU_FREE_CLK 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define STRATIX10_NOC_FREE_CLK 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define STRATIX10_S2F_USR0_CLK 33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define STRATIX10_NOC_CLK 34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define STRATIX10_EMAC_A_FREE_CLK 35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define STRATIX10_EMAC_B_FREE_CLK 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define STRATIX10_EMAC_PTP_FREE_CLK 37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define STRATIX10_GPIO_DB_FREE_CLK 38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define STRATIX10_SDMMC_FREE_CLK 39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define STRATIX10_S2F_USER1_FREE_CLK 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define STRATIX10_PSI_REF_FREE_CLK 41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Gate clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define STRATIX10_MPU_CLK 42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define STRATIX10_L4_MAIN_CLK 43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define STRATIX10_L4_MP_CLK 44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define STRATIX10_L4_SP_CLK 45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define STRATIX10_CS_AT_CLK 46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define STRATIX10_CS_TRACE_CLK 47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define STRATIX10_CS_PDBG_CLK 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define STRATIX10_CS_TIMER_CLK 49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define STRATIX10_S2F_USER0_CLK 50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define STRATIX10_S2F_USER1_CLK 51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define STRATIX10_EMAC0_CLK 52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define STRATIX10_EMAC1_CLK 53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define STRATIX10_EMAC2_CLK 54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define STRATIX10_EMAC_PTP_CLK 55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define STRATIX10_GPIO_DB_CLK 56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define STRATIX10_SDMMC_CLK 57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define STRATIX10_PSI_REF_CLK 58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define STRATIX10_USB_CLK 59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define STRATIX10_SPI_M_CLK 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define STRATIX10_NAND_CLK 61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define STRATIX10_NAND_X_CLK 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define STRATIX10_NAND_ECC_CLK 63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define STRATIX10_NUM_CLKS 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #endif /* __STRATIX10_CLOCK_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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