Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifndef _DT_BINDINGS_CLK_RK618_CRU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define _DT_BINDINGS_CLK_RK618_CRU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LCDC0_CLK		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define LCDC1_CLK		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define VIF_PLLIN_CLK		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SCALER_PLLIN_CLK	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VIF_PLL_CLK		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SCALER_PLL_CLK		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define VIF0_CLK		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define VIF1_CLK		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SCALER_IN_CLK		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SCALER_CLK		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DITHER_CLK		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define HDMI_CLK		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define MIPI_CLK		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LVDS_CLK		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LVTTL_CLK		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RGB_CLK			16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define VIF0_PRE_CLK		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define VIF1_PRE_CLK		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define CODEC_CLK		19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #endif