^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef DT_BINDINGS_DDR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define DT_BINDINGS_DDR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * DDR3 SDRAM Standard Speed Bins include tCK, tRCD, tRP, tRAS and tRC for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * each corresponding bin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* DDR3-800 (5-5-5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define DDR3_800D 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* DDR3-800 (6-6-6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define DDR3_800E 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* DDR3-1066 (6-6-6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DDR3_1066E 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* DDR3-1066 (7-7-7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define DDR3_1066F 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* DDR3-1066 (8-8-8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DDR3_1066G 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* DDR3-1333 (7-7-7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DDR3_1333F 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* DDR3-1333 (8-8-8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DDR3_1333G 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* DDR3-1333 (9-9-9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DDR3_1333H 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* DDR3-1333 (10-10-10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DDR3_1333J 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* DDR3-1600 (8-8-8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DDR3_1600G 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* DDR3-1600 (9-9-9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DDR3_1600H 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* DDR3-1600 (10-10-10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DDR3_1600J 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* DDR3-1600 (11-11-11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DDR3_1600K 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* DDR3-1600 (10-10-10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DDR3_1866J 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* DDR3-1866 (11-11-11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DDR3_1866K 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* DDR3-1866 (12-12-12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DDR3_1866L 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* DDR3-1866 (13-13-13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define DDR3_1866M 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* DDR3-2133 (11-11-11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DDR3_2133K 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* DDR3-2133 (12-12-12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DDR3_2133L 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* DDR3-2133 (13-13-13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DDR3_2133M 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* DDR3-2133 (14-14-14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define DDR3_2133N 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* DDR3 ATF default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DDR3_DEFAULT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif