^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /* GPU_CC clock registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define GPU_CC_CX_GMU_CLK 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define GPU_CC_CXO_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define GPU_CC_GMU_CLK_SRC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define GPU_CC_PLL1 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* GPU_CC Resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define GPUCC_GPU_CC_CX_BCR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define GPUCC_GPU_CC_GMU_BCR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GPUCC_GPU_CC_XO_BCR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* GPU_CC GDSCRs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GPU_CX_GDSC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GPU_GX_GDSC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif