^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2014 LSI Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DT_BINDINGS_CLK_AXM5516_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DT_BINDINGS_CLK_AXM5516_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define AXXIA_CLK_FAB_PLL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define AXXIA_CLK_CPU_PLL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define AXXIA_CLK_SYS_PLL 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define AXXIA_CLK_SM0_PLL 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define AXXIA_CLK_SM1_PLL 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define AXXIA_CLK_FAB_DIV 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define AXXIA_CLK_SYS_DIV 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AXXIA_CLK_NRCP_DIV 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AXXIA_CLK_CPU0_DIV 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AXXIA_CLK_CPU1_DIV 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AXXIA_CLK_CPU2_DIV 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AXXIA_CLK_CPU3_DIV 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AXXIA_CLK_PER_DIV 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AXXIA_CLK_MMC_DIV 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AXXIA_CLK_FAB 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AXXIA_CLK_SYS 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AXXIA_CLK_NRCP 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AXXIA_CLK_CPU0 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AXXIA_CLK_CPU1 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AXXIA_CLK_CPU2 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AXXIA_CLK_CPU3 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AXXIA_CLK_PER 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AXXIA_CLK_MMC 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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