^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This header provides clock numbers for the ingenic,tcu DT binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __DT_BINDINGS_CLOCK_INGENIC_TCU_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __DT_BINDINGS_CLOCK_INGENIC_TCU_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define TCU_CLK_TIMER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define TCU_CLK_TIMER1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TCU_CLK_TIMER2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define TCU_CLK_TIMER3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define TCU_CLK_TIMER4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TCU_CLK_TIMER5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TCU_CLK_TIMER6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TCU_CLK_TIMER7 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TCU_CLK_WDT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TCU_CLK_OST 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #endif /* __DT_BINDINGS_CLOCK_INGENIC_TCU_H__ */