Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __DT_BINDINGS_CLOCK_EFM32_CMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __DT_BINDINGS_CLOCK_EFM32_CMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #define clk_HFXO		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define clk_HFRCO		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define clk_LFXO		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define clk_LFRCO		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define clk_ULFRCO		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define clk_AUXHFRCO		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define clk_HFCLKNODIV		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define clk_HFCLK		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define clk_HFPERCLK		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define clk_HFCORECLK		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define clk_LFACLK		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define clk_LFBCLK		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define clk_WDOGCLK		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define clk_HFCORECLKDMA	13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define clk_HFCORECLKAES	14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define clk_HFCORECLKUSBC	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define clk_HFCORECLKUSB	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define clk_HFCORECLKLE		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define clk_HFCORECLKEBI	18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define clk_HFPERCLKUSART0	19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define clk_HFPERCLKUSART1	20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define clk_HFPERCLKUSART2	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define clk_HFPERCLKUART0	22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define clk_HFPERCLKUART1	23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define clk_HFPERCLKTIMER0	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define clk_HFPERCLKTIMER1	25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define clk_HFPERCLKTIMER2	26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define clk_HFPERCLKTIMER3	27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define clk_HFPERCLKACMP0	28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define clk_HFPERCLKACMP1	29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define clk_HFPERCLKI2C0	30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define clk_HFPERCLKI2C1	31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define clk_HFPERCLKGPIO	32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define clk_HFPERCLKVCMP	33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define clk_HFPERCLKPRS		34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define clk_HFPERCLKADC0	35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define clk_HFPERCLKDAC0	36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif /* __DT_BINDINGS_CLOCK_EFM32_CMU_H */