^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __DT_BINDINGS_CLOCK_BCM6368_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __DT_BINDINGS_CLOCK_BCM6368_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define BCM6368_CLK_VDSL_QPROC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define BCM6368_CLK_VDSL_AFE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define BCM6368_CLK_VDSL_BONDING 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define BCM6368_CLK_VDSL 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define BCM6368_CLK_PHYMIPS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define BCM6368_CLK_SWPKT_USB 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define BCM6368_CLK_SWPKT_SAR 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define BCM6368_CLK_SPI 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define BCM6368_CLK_USBD 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define BCM6368_CLK_SAR 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define BCM6368_CLK_ROBOSW 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BCM6368_CLK_UTOPIA 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define BCM6368_CLK_PCM 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define BCM6368_CLK_USBH 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BCM6368_CLK_DIS_GLESS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define BCM6368_CLK_NAND 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BCM6368_CLK_IPSEC 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* __DT_BINDINGS_CLOCK_BCM6368_H */