Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2015 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define BCM2835_PLLA			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define BCM2835_PLLB			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define BCM2835_PLLC			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define BCM2835_PLLD			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define BCM2835_PLLH			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define BCM2835_PLLA_CORE		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define BCM2835_PLLA_PER		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define BCM2835_PLLB_ARM		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define BCM2835_PLLC_CORE0		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define BCM2835_PLLC_CORE1		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BCM2835_PLLC_CORE2		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define BCM2835_PLLC_PER		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define BCM2835_PLLD_CORE		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BCM2835_PLLD_PER		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define BCM2835_PLLH_RCAL		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BCM2835_PLLH_AUX		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BCM2835_PLLH_PIX		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BCM2835_CLOCK_TIMER		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BCM2835_CLOCK_OTP		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BCM2835_CLOCK_UART		19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define BCM2835_CLOCK_VPU		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define BCM2835_CLOCK_V3D		21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define BCM2835_CLOCK_ISP		22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define BCM2835_CLOCK_H264		23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define BCM2835_CLOCK_VEC		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define BCM2835_CLOCK_HSM		25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define BCM2835_CLOCK_SDRAM		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define BCM2835_CLOCK_TSENS		27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define BCM2835_CLOCK_EMMC		28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define BCM2835_CLOCK_PERI_IMAGE	29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define BCM2835_CLOCK_PWM		30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define BCM2835_CLOCK_PCM		31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define BCM2835_PLLA_DSI0		32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define BCM2835_PLLA_CCP2		33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define BCM2835_PLLD_DSI0		34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define BCM2835_PLLD_DSI1		35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BCM2835_CLOCK_AVEO		36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define BCM2835_CLOCK_DFT		37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define BCM2835_CLOCK_GP0		38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define BCM2835_CLOCK_GP1		39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define BCM2835_CLOCK_GP2		40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define BCM2835_CLOCK_SLIM		41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define BCM2835_CLOCK_SMI		42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define BCM2835_CLOCK_TEC		43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define BCM2835_CLOCK_DPI		44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define BCM2835_CLOCK_CAM0		45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define BCM2835_CLOCK_CAM1		46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define BCM2835_CLOCK_DSI0E		47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BCM2835_CLOCK_DSI1E		48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define BCM2835_CLOCK_DSI0P		49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define BCM2835_CLOCK_DSI1P		50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define BCM2711_CLOCK_EMMC2		51