Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  *  BSD LICENSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *  are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *	* Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *	  notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *	* Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  *	  notice, this list of conditions and the following disclaimer in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  *	  the documentation and/or other materials provided with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *	  distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *	* Neither the name of Broadcom Corporation nor the names of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *	  contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *	  from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifndef _CLOCK_BCM_NSP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define _CLOCK_BCM_NSP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* GENPLL clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define BCM_NSP_GENPLL			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define BCM_NSP_GENPLL_PHY_CLK		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define BCM_NSP_GENPLL_ENET_SW_CLK	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define BCM_NSP_GENPLL_USB_PHY_REF_CLK	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define BCM_NSP_GENPLL_IPROCFAST_CLK	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define BCM_NSP_GENPLL_SATA1_CLK	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define BCM_NSP_GENPLL_SATA2_CLK	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* LCPLL0 clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BCM_NSP_LCPLL0			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define BCM_NSP_LCPLL0_SDIO_CLK		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define BCM_NSP_LCPLL0_DDR_PHY_CLK	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif /* _CLOCK_BCM_NSP_H */