^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * BSD LICENSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * * Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * * Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * notice, this list of conditions and the following disclaimer in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * the documentation and/or other materials provided with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * * Neither the name of Broadcom Corporation nor the names of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifndef _CLOCK_BCM_NS2_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define _CLOCK_BCM_NS2_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* GENPLL SCR clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define BCM_NS2_GENPLL_SCR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define BCM_NS2_GENPLL_SCR_SCR_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define BCM_NS2_GENPLL_SCR_FS_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define BCM_NS2_GENPLL_SCR_AUDIO_CLK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define BCM_NS2_GENPLL_SCR_CH3_UNUSED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define BCM_NS2_GENPLL_SCR_CH4_UNUSED 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define BCM_NS2_GENPLL_SCR_CH5_UNUSED 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* GENPLL SW clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BCM_NS2_GENPLL_SW 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define BCM_NS2_GENPLL_SW_RPE_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define BCM_NS2_GENPLL_SW_250_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define BCM_NS2_GENPLL_SW_NIC_CLK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define BCM_NS2_GENPLL_SW_CHIMP_CLK 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define BCM_NS2_GENPLL_SW_PORT_CLK 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define BCM_NS2_GENPLL_SW_SDIO_CLK 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* LCPLL DDR clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define BCM_NS2_LCPLL_DDR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define BCM_NS2_LCPLL_DDR_PCIE_SATA_USB_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define BCM_NS2_LCPLL_DDR_DDR_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BCM_NS2_LCPLL_DDR_CH2_UNUSED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define BCM_NS2_LCPLL_DDR_CH3_UNUSED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define BCM_NS2_LCPLL_DDR_CH4_UNUSED 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define BCM_NS2_LCPLL_DDR_CH5_UNUSED 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* LCPLL PORTS clock channel ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define BCM_NS2_LCPLL_PORTS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define BCM_NS2_LCPLL_PORTS_WAN_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define BCM_NS2_LCPLL_PORTS_RGMII_CLK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define BCM_NS2_LCPLL_PORTS_CH2_UNUSED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define BCM_NS2_LCPLL_PORTS_CH3_UNUSED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define BCM_NS2_LCPLL_PORTS_CH4_UNUSED 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define BCM_NS2_LCPLL_PORTS_CH5_UNUSED 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif /* _CLOCK_BCM_NS2_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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