^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016 BayLibre, SAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Neil Armstrong <narmstrong@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2018 Amlogic, inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Qiufang Dai <qiufang.dai@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CLKID_AO_REMOTE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CLKID_AO_I2C_MASTER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CLKID_AO_I2C_SLAVE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CLKID_AO_UART1 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CLKID_AO_UART2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CLKID_AO_IR_BLASTER 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CLKID_AO_SAR_ADC 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CLKID_AO_CLK81 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CLKID_AO_SAR_ADC_SEL 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CLKID_AO_SAR_ADC_DIV 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CLKID_AO_SAR_ADC_CLK 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CLKID_AO_CTS_OSCIN 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define CLKID_AO_32K_PRE 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CLKID_AO_32K_DIV 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CLKID_AO_32K_SEL 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CLKID_AO_32K 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CLKID_AO_CTS_RTC_OSCIN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif