^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2013 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * copy of this software and associated documentation files (the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * "Software"), to deal in the Software without restriction, including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * without limitation the rights to use, copy, modify, merge, publish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * distribute, sub license, and/or sell copies of the Software, and to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * permit persons to whom the Software is furnished to do so, subject to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The above copyright notice and this permission notice (including the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * next paragraph) shall be included in all copies or substantial portions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #ifndef _I915_PCIIDS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define _I915_PCIIDS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * A pci_device_id struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * __u32 vendor, device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * __u32 subvendor, subdevice;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * __u32 class, class_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * kernel_ulong_t driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Don't use C99 here because "class" is reserved and we want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * give userspace flexibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define INTEL_VGA_DEVICE(id, info) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 0x8086, id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ~0, ~0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 0x030000, 0xff0000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) (unsigned long) info }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define INTEL_QUANTA_VGA_DEVICE(info) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 0x8086, 0x16a, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 0x152d, 0x8990, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0x030000, 0xff0000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) (unsigned long) info }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define INTEL_I810_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) INTEL_VGA_DEVICE(0x7121, info), /* I810 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) INTEL_VGA_DEVICE(0x7125, info) /* I810_E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define INTEL_I815_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) INTEL_VGA_DEVICE(0x1132, info) /* I815*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define INTEL_I830_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) INTEL_VGA_DEVICE(0x3577, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define INTEL_I845G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) INTEL_VGA_DEVICE(0x2562, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define INTEL_I85X_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) INTEL_VGA_DEVICE(0x358e, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define INTEL_I865G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) INTEL_VGA_DEVICE(0x2572, info) /* I865_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define INTEL_I915G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INTEL_I915GM_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define INTEL_I945G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) INTEL_VGA_DEVICE(0x2772, info) /* I945_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define INTEL_I945GM_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define INTEL_I965G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define INTEL_G33_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define INTEL_I965GM_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define INTEL_GM45_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define INTEL_G45_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define INTEL_PINEVIEW_G_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) INTEL_VGA_DEVICE(0xa001, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define INTEL_PINEVIEW_M_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) INTEL_VGA_DEVICE(0xa011, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define INTEL_IRONLAKE_D_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) INTEL_VGA_DEVICE(0x0042, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define INTEL_IRONLAKE_M_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) INTEL_VGA_DEVICE(0x0046, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define INTEL_SNB_D_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) INTEL_VGA_DEVICE(0x0102, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) INTEL_VGA_DEVICE(0x010A, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define INTEL_SNB_D_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) INTEL_VGA_DEVICE(0x0112, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) INTEL_VGA_DEVICE(0x0122, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define INTEL_SNB_D_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) INTEL_SNB_D_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) INTEL_SNB_D_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define INTEL_SNB_M_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) INTEL_VGA_DEVICE(0x0106, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define INTEL_SNB_M_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) INTEL_VGA_DEVICE(0x0116, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) INTEL_VGA_DEVICE(0x0126, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define INTEL_SNB_M_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) INTEL_SNB_M_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) INTEL_SNB_M_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define INTEL_IVB_M_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define INTEL_IVB_M_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define INTEL_IVB_M_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) INTEL_IVB_M_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) INTEL_IVB_M_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define INTEL_IVB_D_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) INTEL_VGA_DEVICE(0x015a, info) /* GT1 server */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define INTEL_IVB_D_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define INTEL_IVB_D_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) INTEL_IVB_D_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) INTEL_IVB_D_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define INTEL_IVB_Q_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define INTEL_HSW_ULT_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) INTEL_VGA_DEVICE(0x0A06, info) /* ULT GT1 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define INTEL_HSW_ULX_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define INTEL_HSW_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) INTEL_HSW_ULT_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) INTEL_HSW_ULX_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define INTEL_HSW_ULT_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) INTEL_VGA_DEVICE(0x0A16, info) /* ULT GT2 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define INTEL_HSW_ULX_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define INTEL_HSW_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) INTEL_HSW_ULT_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) INTEL_HSW_ULX_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define INTEL_HSW_ULT_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) INTEL_VGA_DEVICE(0x0A2E, info) /* ULT GT3 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define INTEL_HSW_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) INTEL_HSW_ULT_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define INTEL_HSW_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) INTEL_HSW_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) INTEL_HSW_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) INTEL_HSW_GT3_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define INTEL_VLV_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) INTEL_VGA_DEVICE(0x0f30, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) INTEL_VGA_DEVICE(0x0f31, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) INTEL_VGA_DEVICE(0x0f32, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) INTEL_VGA_DEVICE(0x0f33, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define INTEL_BDW_ULT_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) INTEL_VGA_DEVICE(0x160B, info) /* GT1 Iris */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define INTEL_BDW_ULX_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define INTEL_BDW_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) INTEL_BDW_ULT_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) INTEL_BDW_ULX_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define INTEL_BDW_ULT_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) INTEL_VGA_DEVICE(0x161B, info) /* GT2 ULT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define INTEL_BDW_ULX_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define INTEL_BDW_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) INTEL_BDW_ULT_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) INTEL_BDW_ULX_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define INTEL_BDW_ULT_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) INTEL_VGA_DEVICE(0x162B, info) /* Iris */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define INTEL_BDW_ULX_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) INTEL_VGA_DEVICE(0x162E, info) /* ULX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define INTEL_BDW_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) INTEL_BDW_ULT_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) INTEL_BDW_ULX_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define INTEL_BDW_ULT_RSVD_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) INTEL_VGA_DEVICE(0x163B, info) /* Iris */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define INTEL_BDW_ULX_RSVD_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) INTEL_VGA_DEVICE(0x163E, info) /* ULX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define INTEL_BDW_RSVD_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) INTEL_BDW_ULT_RSVD_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) INTEL_BDW_ULX_RSVD_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define INTEL_BDW_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) INTEL_BDW_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) INTEL_BDW_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) INTEL_BDW_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) INTEL_BDW_RSVD_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define INTEL_CHV_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) INTEL_VGA_DEVICE(0x22b0, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) INTEL_VGA_DEVICE(0x22b1, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) INTEL_VGA_DEVICE(0x22b2, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) INTEL_VGA_DEVICE(0x22b3, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define INTEL_SKL_ULT_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define INTEL_SKL_ULX_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define INTEL_SKL_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) INTEL_SKL_ULT_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) INTEL_SKL_ULX_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define INTEL_SKL_ULT_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) INTEL_VGA_DEVICE(0x1921, info) /* ULT GT2F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define INTEL_SKL_ULX_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define INTEL_SKL_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) INTEL_SKL_ULT_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) INTEL_SKL_ULX_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define INTEL_SKL_ULT_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define INTEL_SKL_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) INTEL_SKL_ULT_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define INTEL_SKL_GT4_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) INTEL_VGA_DEVICE(0x192A, info), /* SRV GT4 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) INTEL_VGA_DEVICE(0x193A, info) /* SRV GT4e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define INTEL_SKL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) INTEL_SKL_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) INTEL_SKL_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) INTEL_SKL_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) INTEL_SKL_GT4_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define INTEL_BXT_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) INTEL_VGA_DEVICE(0x0A84, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) INTEL_VGA_DEVICE(0x1A84, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) INTEL_VGA_DEVICE(0x1A85, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) INTEL_VGA_DEVICE(0x5A85, info) /* APL HD Graphics 500 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define INTEL_GLK_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) INTEL_VGA_DEVICE(0x3184, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) INTEL_VGA_DEVICE(0x3185, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define INTEL_KBL_ULT_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) INTEL_VGA_DEVICE(0x5913, info) /* ULT GT1.5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define INTEL_KBL_ULX_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) INTEL_VGA_DEVICE(0x5915, info) /* ULX GT1.5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define INTEL_KBL_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) INTEL_KBL_ULT_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) INTEL_KBL_ULX_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #define INTEL_KBL_ULT_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) INTEL_VGA_DEVICE(0x5921, info) /* ULT GT2F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define INTEL_KBL_ULX_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) INTEL_VGA_DEVICE(0x591E, info) /* ULX GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define INTEL_KBL_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) INTEL_KBL_ULT_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) INTEL_KBL_ULX_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define INTEL_KBL_ULT_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #define INTEL_KBL_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) INTEL_KBL_ULT_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define INTEL_KBL_GT4_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* AML/KBL Y GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define INTEL_AML_KBL_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* AML/CFL Y GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define INTEL_AML_CFL_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) INTEL_VGA_DEVICE(0x87CA, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* CML GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define INTEL_CML_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) INTEL_VGA_DEVICE(0x9BA5, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) INTEL_VGA_DEVICE(0x9BA8, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) INTEL_VGA_DEVICE(0x9BA4, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) INTEL_VGA_DEVICE(0x9BA2, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define INTEL_CML_U_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) INTEL_VGA_DEVICE(0x9B21, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) INTEL_VGA_DEVICE(0x9BAA, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) INTEL_VGA_DEVICE(0x9BAC, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* CML GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #define INTEL_CML_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) INTEL_VGA_DEVICE(0x9BC5, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) INTEL_VGA_DEVICE(0x9BC8, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) INTEL_VGA_DEVICE(0x9BC4, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) INTEL_VGA_DEVICE(0x9BC2, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) INTEL_VGA_DEVICE(0x9BC6, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) INTEL_VGA_DEVICE(0x9BE6, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) INTEL_VGA_DEVICE(0x9BF6, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define INTEL_CML_U_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) INTEL_VGA_DEVICE(0x9B41, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) INTEL_VGA_DEVICE(0x9BCA, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) INTEL_VGA_DEVICE(0x9BCC, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #define INTEL_KBL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) INTEL_KBL_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) INTEL_KBL_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) INTEL_KBL_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) INTEL_KBL_GT4_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) INTEL_AML_KBL_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /* CFL S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define INTEL_CFL_S_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #define INTEL_CFL_S_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* CFL H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define INTEL_CFL_H_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) INTEL_VGA_DEVICE(0x3E9C, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define INTEL_CFL_H_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* CFL U GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define INTEL_CFL_U_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) INTEL_VGA_DEVICE(0x3EA9, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* CFL U GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #define INTEL_CFL_U_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* WHL/CFL U GT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #define INTEL_WHL_U_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) INTEL_VGA_DEVICE(0x3EA1, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) INTEL_VGA_DEVICE(0x3EA4, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* WHL/CFL U GT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #define INTEL_WHL_U_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) INTEL_VGA_DEVICE(0x3EA0, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) INTEL_VGA_DEVICE(0x3EA3, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* WHL/CFL U GT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) #define INTEL_WHL_U_GT3_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) INTEL_VGA_DEVICE(0x3EA2, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #define INTEL_CFL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) INTEL_CFL_S_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) INTEL_CFL_S_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) INTEL_CFL_H_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) INTEL_CFL_H_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) INTEL_CFL_U_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) INTEL_CFL_U_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) INTEL_WHL_U_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) INTEL_WHL_U_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) INTEL_WHL_U_GT3_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) INTEL_AML_CFL_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) INTEL_CML_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) INTEL_CML_GT2_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) INTEL_CML_U_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) INTEL_CML_U_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* CNL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) #define INTEL_CNL_PORT_F_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) INTEL_VGA_DEVICE(0x5A54, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) INTEL_VGA_DEVICE(0x5A5C, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) INTEL_VGA_DEVICE(0x5A44, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) INTEL_VGA_DEVICE(0x5A4C, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) #define INTEL_CNL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) INTEL_CNL_PORT_F_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) INTEL_VGA_DEVICE(0x5A51, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) INTEL_VGA_DEVICE(0x5A59, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) INTEL_VGA_DEVICE(0x5A41, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) INTEL_VGA_DEVICE(0x5A49, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) INTEL_VGA_DEVICE(0x5A52, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) INTEL_VGA_DEVICE(0x5A5A, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) INTEL_VGA_DEVICE(0x5A42, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) INTEL_VGA_DEVICE(0x5A4A, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) INTEL_VGA_DEVICE(0x5A50, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) INTEL_VGA_DEVICE(0x5A40, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* ICL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) #define INTEL_ICL_PORT_F_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) INTEL_VGA_DEVICE(0x8A50, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) INTEL_VGA_DEVICE(0x8A5C, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) INTEL_VGA_DEVICE(0x8A59, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) INTEL_VGA_DEVICE(0x8A58, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) INTEL_VGA_DEVICE(0x8A52, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) INTEL_VGA_DEVICE(0x8A5A, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) INTEL_VGA_DEVICE(0x8A5B, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) INTEL_VGA_DEVICE(0x8A57, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) INTEL_VGA_DEVICE(0x8A56, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) INTEL_VGA_DEVICE(0x8A71, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) INTEL_VGA_DEVICE(0x8A70, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) INTEL_VGA_DEVICE(0x8A53, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) INTEL_VGA_DEVICE(0x8A54, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define INTEL_ICL_11_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) INTEL_ICL_PORT_F_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) INTEL_VGA_DEVICE(0x8A51, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) INTEL_VGA_DEVICE(0x8A5D, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* EHL/JSL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) #define INTEL_EHL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) INTEL_VGA_DEVICE(0x4500, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) INTEL_VGA_DEVICE(0x4571, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) INTEL_VGA_DEVICE(0x4551, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) INTEL_VGA_DEVICE(0x4541, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) INTEL_VGA_DEVICE(0x4E71, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) INTEL_VGA_DEVICE(0x4557, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) INTEL_VGA_DEVICE(0x4555, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) INTEL_VGA_DEVICE(0x4E61, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) INTEL_VGA_DEVICE(0x4E57, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) INTEL_VGA_DEVICE(0x4E55, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) INTEL_VGA_DEVICE(0x4E51, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /* TGL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) #define INTEL_TGL_12_GT1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) INTEL_VGA_DEVICE(0x9A60, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) INTEL_VGA_DEVICE(0x9A68, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) INTEL_VGA_DEVICE(0x9A70, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) #define INTEL_TGL_12_GT2_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) INTEL_VGA_DEVICE(0x9A40, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) INTEL_VGA_DEVICE(0x9A49, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) INTEL_VGA_DEVICE(0x9A59, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) INTEL_VGA_DEVICE(0x9A78, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) INTEL_VGA_DEVICE(0x9AC0, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) INTEL_VGA_DEVICE(0x9AC9, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) INTEL_VGA_DEVICE(0x9AD9, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) INTEL_VGA_DEVICE(0x9AF8, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #define INTEL_TGL_12_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) INTEL_TGL_12_GT1_IDS(info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) INTEL_TGL_12_GT2_IDS(info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /* RKL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) #define INTEL_RKL_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) INTEL_VGA_DEVICE(0x4C80, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) INTEL_VGA_DEVICE(0x4C8A, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) INTEL_VGA_DEVICE(0x4C8B, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) INTEL_VGA_DEVICE(0x4C8C, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) INTEL_VGA_DEVICE(0x4C90, info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) INTEL_VGA_DEVICE(0x4C9A, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* DG1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) #define INTEL_DG1_IDS(info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) INTEL_VGA_DEVICE(0x4905, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) #endif /* _I915_PCIIDS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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