^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * copy of this software and associated documentation files (the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * "Software"), to deal in the Software without restriction, including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * without limitation the rights to use, copy, modify, merge, publish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * distribute, sub license, and/or sell copies of the Software, and to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * permit persons to whom the Software is furnished to do so, subject to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The above copyright notice and this permission notice (including the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * next paragraph) shall be included in all copies or substantial portions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifndef _I915_DRM_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define _I915_DRM_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <drm/i915_pciids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <uapi/drm/i915_drm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* For use by IPS driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned long i915_read_mch_val(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) bool i915_gpu_raise(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) bool i915_gpu_lower(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) bool i915_gpu_busy(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) bool i915_gpu_turbo_disable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Exported from arch/x86/kernel/early-quirks.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern struct resource intel_graphics_stolen_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * The Bridge device's PCI config space has information about the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * fb aperture size and the amount of pre-reserved memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This is all handled in the intel-gtt.ko module. i915.ko only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * cares about the vga bit for the vga rbiter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define INTEL_GMCH_CTRL 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define INTEL_GMCH_VGA_DISABLE (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SNB_GMCH_CTRL 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SNB_GMCH_GGMS_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SNB_GMCH_GMS_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define BDW_GMCH_GGMS_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define BDW_GMCH_GGMS_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define BDW_GMCH_GMS_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BDW_GMCH_GMS_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define I830_GMCH_CTRL 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define I830_GMCH_GMS_MASK 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define I830_GMCH_GMS_LOCAL 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define I830_GMCH_GMS_STOLEN_512 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define I830_GMCH_GMS_STOLEN_1024 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define I830_GMCH_GMS_STOLEN_8192 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define I855_GMCH_GMS_MASK 0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define I855_GMCH_GMS_STOLEN_0M 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define I830_DRB3 0x63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define I85X_DRB3 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define I865_TOUD 0xc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define I830_ESMRAMC 0x91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define I845_ESMRAMC 0x9e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define I85X_ESMRAMC 0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define TSEG_ENABLE (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define I830_TSEG_SIZE_512K (0 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define I830_TSEG_SIZE_1M (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define I845_TSEG_SIZE_MASK (3 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define I845_TSEG_SIZE_512K (2 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define I845_TSEG_SIZE_1M (3 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define INTEL_BSM 0x5c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define INTEL_GEN11_BSM_DW0 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define INTEL_GEN11_BSM_DW1 0xc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define INTEL_BSM_MASK (-(1u << 20))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #endif /* _I915_DRM_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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