^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2015 Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #ifndef _DRM_GPU_SCHEDULER_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define _DRM_GPU_SCHEDULER_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <drm/spsc_queue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/dma-fence.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct drm_gpu_scheduler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct drm_sched_rq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* These are often used as an (initial) index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * to an array, and as such should start at 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) enum drm_sched_priority {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) DRM_SCHED_PRIORITY_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DRM_SCHED_PRIORITY_NORMAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) DRM_SCHED_PRIORITY_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) DRM_SCHED_PRIORITY_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) DRM_SCHED_PRIORITY_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) DRM_SCHED_PRIORITY_UNSET = -2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * struct drm_sched_entity - A wrapper around a job queue (typically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * attached to the DRM file_priv).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @list: used to append this struct to the list of entities in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * runqueue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @rq: runqueue on which this entity is currently scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @sched_list: A list of schedulers (drm_gpu_schedulers).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Jobs from this entity can be scheduled on any scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * on this list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @num_sched_list: number of drm_gpu_schedulers in the sched_list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @priority: priority of the entity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @rq_lock: lock to modify the runqueue to which this entity belongs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @job_queue: the list of jobs of this entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @fence_seq: a linearly increasing seqno incremented with each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * new &drm_sched_fence which is part of the entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @fence_context: a unique context for all the fences which belong
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * to this entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * The &drm_sched_fence.scheduled uses the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * fence_context but &drm_sched_fence.finished uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * fence_context + 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * @dependency: the dependency fence of the job which is on the top
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * of the job queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * @cb: callback for the dependency fence above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @guilty: points to ctx's guilty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @fini_status: contains the exit status in case the process was signalled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @last_scheduled: points to the finished fence of the last scheduled job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @last_user: last group leader pushing a job into the entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @stopped: Marks the enity as removed from rq and destined for termination.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @entity_idle: Signals when enityt is not in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * Entities will emit jobs in order to their corresponding hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * ring, and the scheduler will alternate between entities based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * scheduling policy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct drm_sched_entity {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct drm_sched_rq *rq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct drm_gpu_scheduler **sched_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned int num_sched_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) enum drm_sched_priority priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) spinlock_t rq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct spsc_queue job_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) atomic_t fence_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) uint64_t fence_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct dma_fence *dependency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct dma_fence_cb cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) atomic_t *guilty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct dma_fence *last_scheduled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct task_struct *last_user;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) bool stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct completion entity_idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * struct drm_sched_rq - queue of entities to be scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @lock: to modify the entities list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @sched: the scheduler to which this rq belongs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @entities: list of the entities to be scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * @current_entity: the entity which is to be scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * Run queue is a set of entities scheduling command submissions for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * one specific ring. It implements the scheduling policy that selects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * the next entity to emit commands from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct drm_sched_rq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct drm_gpu_scheduler *sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct list_head entities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct drm_sched_entity *current_entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * struct drm_sched_fence - fences corresponding to the scheduling of a job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct drm_sched_fence {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @scheduled: this fence is what will be signaled by the scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * when the job is scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct dma_fence scheduled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @finished: this fence is what will be signaled by the scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * when the job is completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * When setting up an out fence for the job, you should use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * this, since it's available immediately upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * drm_sched_job_init(), and the fence returned by the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * from run_job() won't be created until the dependencies have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * resolved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct dma_fence finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * @parent: the fence returned by &drm_sched_backend_ops.run_job
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * when scheduling the job on hardware. We signal the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * &drm_sched_fence.finished fence once parent is signalled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct dma_fence *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @sched: the scheduler instance to which the job having this struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * belongs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct drm_gpu_scheduler *sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * @lock: the lock used by the scheduled and the finished fences.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @owner: job owner for debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void *owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * struct drm_sched_job - A job to be run by an entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @queue_node: used to append this struct to the queue of jobs in an entity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @sched: the scheduler instance on which this job is scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * @s_fence: contains the fences for the scheduling of job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * @finish_cb: the callback for the finished fence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @id: a unique id assigned to each job scheduled on the scheduler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * @karma: increment on every hang caused by this job. If this exceeds the hang
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * limit of the scheduler then the job is marked guilty and will not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * be scheduled further.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @s_priority: the priority of the job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @entity: the entity to which this job belongs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @cb: the callback for the parent fence in s_fence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * A job is created by the driver using drm_sched_job_init(), and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * should call drm_sched_entity_push_job() once it wants the scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * to schedule the job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct drm_sched_job {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct spsc_node queue_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct drm_gpu_scheduler *sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct drm_sched_fence *s_fence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct dma_fence_cb finish_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) uint64_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) atomic_t karma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) enum drm_sched_priority s_priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct drm_sched_entity *entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct dma_fence_cb cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int threshold)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return (s_job && atomic_inc_return(&s_job->karma) > threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * struct drm_sched_backend_ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * Define the backend operations called by the scheduler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * these functions should be implemented in driver side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct drm_sched_backend_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @dependency: Called when the scheduler is considering scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * this job next, to get another struct dma_fence for this job to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * block on. Once it returns NULL, run_job() may be called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct drm_sched_entity *s_entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * @run_job: Called to execute the job once all of the dependencies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * have been resolved. This may be called multiple times, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * timedout_job() has happened and drm_sched_job_recovery()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * decides to try it again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @timedout_job: Called when a job has taken too long to execute,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * to trigger GPU recovery.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) void (*timedout_job)(struct drm_sched_job *sched_job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * @free_job: Called once the job's finished fence has been signaled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * and it's time to clean it up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) void (*free_job)(struct drm_sched_job *sched_job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * struct drm_gpu_scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * @ops: backend operations provided by the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * @hw_submission_limit: the max size of the hardware queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * @timeout: the time after which a job is removed from the scheduler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * @name: name of the ring for which this scheduler is being used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * @sched_rq: priority wise array of run queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * @wake_up_worker: the wait queue on which the scheduler sleeps until a job
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * is ready to be scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * waits on this wait queue until all the scheduled jobs are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * finished.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * @hw_rq_count: the number of jobs currently in the hardware queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @job_id_count: used to assign unique id to the each job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * timeout interval is over.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * @thread: the kthread on which the scheduler which run.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * @ring_mirror_list: the list of jobs which are currently in the job queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * @job_list_lock: lock to protect the ring_mirror_list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * @hang_limit: once the hangs by a job crosses this limit then it is marked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * guilty and it will be considered for scheduling further.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * @score: score to help loadbalancer pick a idle sched
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * @ready: marks if the underlying HW is ready to work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * @free_guilty: A hit to time out handler to free the guilty job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * One scheduler is implemented for each hardware ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct drm_gpu_scheduler {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) const struct drm_sched_backend_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) uint32_t hw_submission_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) wait_queue_head_t wake_up_worker;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) wait_queue_head_t job_scheduled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) atomic_t hw_rq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) atomic64_t job_id_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct delayed_work work_tdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct task_struct *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct list_head ring_mirror_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) spinlock_t job_list_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int hang_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) atomic_t score;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) bool ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) bool free_guilty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int drm_sched_init(struct drm_gpu_scheduler *sched,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) const struct drm_sched_backend_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) uint32_t hw_submission, unsigned hang_limit, long timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) void drm_sched_fini(struct drm_gpu_scheduler *sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int drm_sched_job_init(struct drm_sched_job *job,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct drm_sched_entity *entity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) void *owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct drm_gpu_scheduler **sched_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) unsigned int num_sched_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) void drm_sched_job_cleanup(struct drm_sched_job *job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) void drm_sched_increase_karma(struct drm_sched_job *bad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) bool drm_sched_dependency_optimized(struct dma_fence* fence,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) void drm_sched_fault(struct drm_gpu_scheduler *sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) void drm_sched_job_kickout(struct drm_sched_job *s_job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int drm_sched_entity_init(struct drm_sched_entity *entity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) enum drm_sched_priority priority,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct drm_gpu_scheduler **sched_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) unsigned int num_sched_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) atomic_t *guilty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) void drm_sched_entity_fini(struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) void drm_sched_entity_destroy(struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) enum drm_sched_priority priority);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct drm_sched_fence *drm_sched_fence_create(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct drm_sched_entity *s_entity, void *owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) void drm_sched_fence_finished(struct drm_sched_fence *fence);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) unsigned long remaining);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct drm_gpu_scheduler *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) drm_sched_pick_best(struct drm_gpu_scheduler **sched_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) unsigned int num_sched_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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