^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MIPI DSI Bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Andrzej Hajda <a.hajda@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __DRM_MIPI_DSI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __DRM_MIPI_DSI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct mipi_dsi_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct mipi_dsi_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct drm_dsc_picture_parameter_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* request ACK from peripheral */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MIPI_DSI_MSG_REQ_ACK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* use Low Power Mode to transmit message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MIPI_DSI_MSG_USE_LPM BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* read mipi_dsi_msg.ctrl and unicast to only that ctrls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MIPI_DSI_MSG_UNICAST BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Stack all commands until lastcommand bit and trigger all in one go */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MIPI_DSI_MSG_LASTCOMMAND BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * struct mipi_dsi_msg - read/write DSI buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @channel: virtual channel id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @type: payload data type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @flags: flags controlling this message transmission
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @ctrl: ctrl index to transmit on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @wait_ms: duration in ms to wait after message transmission
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @tx_len: length of @tx_buf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @tx_buf: data to be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @rx_len: length of @rx_buf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @rx_buf: data to be read, or NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct mipi_dsi_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 wait_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) size_t tx_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) const void *tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) size_t rx_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void *rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) bool mipi_dsi_packet_format_is_short(u8 type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) bool mipi_dsi_packet_format_is_long(u8 type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @size: size (in bytes) of the packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @header: the four bytes that make up the header (Data ID, Word Count or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Packet Data, and ECC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @payload_length: number of bytes in the payload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @payload: a pointer to a buffer containing the payload, if any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct mipi_dsi_packet {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 header[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) size_t payload_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) const u8 *payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) const struct mipi_dsi_msg *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * struct mipi_dsi_host_ops - DSI bus operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @attach: attach DSI device to DSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @detach: detach DSI device from DSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @transfer: transmit a DSI packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * structures. This structure contains information about the type of packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * being transmitted as well as the transmit and receive buffers. When an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * error is encountered during transmission, this function will return a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * negative error code. On success it shall return the number of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * transmitted for write packets or the number of bytes received for read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Note that typically DSI packet transmission is atomic, so the .transfer()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * function will seldomly return anything other than the number of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * contained in the transmit buffer on success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct mipi_dsi_host_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int (*attach)(struct mipi_dsi_host *host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int (*detach)(struct mipi_dsi_host *host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ssize_t (*transfer)(struct mipi_dsi_host *host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const struct mipi_dsi_msg *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * struct mipi_dsi_host - DSI host device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @dev: driver model device node for this DSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @ops: DSI host operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @list: list management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct mipi_dsi_host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) const struct mipi_dsi_host_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int mipi_dsi_host_register(struct mipi_dsi_host *host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* DSI mode flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* video mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define MIPI_DSI_MODE_VIDEO BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* video burst mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* video pulse mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* enable auto vertical count mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* enable hsync-end packets in vsync-pulse and v-porch area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* disable hfront-porch area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define MIPI_DSI_MODE_VIDEO_HFP BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* disable hback-porch area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define MIPI_DSI_MODE_VIDEO_HBP BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* disable hsync-active area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define MIPI_DSI_MODE_VIDEO_HSA BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* flush display FIFO on vsync pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* disable EoT packets in HS mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define MIPI_DSI_MODE_EOT_PACKET BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* transmit data in low power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define MIPI_DSI_MODE_LPM BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* disable BLLP area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define MIPI_DSI_MODE_VIDEO_BLLP BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* disable EOF BLLP area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define MIPI_DSI_MODE_VIDEO_EOF_BLLP BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) enum mipi_dsi_pixel_format {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MIPI_DSI_FMT_RGB888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MIPI_DSI_FMT_RGB666,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MIPI_DSI_FMT_RGB666_PACKED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MIPI_DSI_FMT_RGB565,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define DSI_DEV_NAME_SIZE 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * struct mipi_dsi_device_info - template for creating a mipi_dsi_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * @type: DSI peripheral chip type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * @channel: DSI virtual channel assigned to peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * @node: pointer to OF device node or NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * This is populated and passed to mipi_dsi_device_new to create a new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * DSI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct mipi_dsi_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) char type[DSI_DEV_NAME_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) u32 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * struct mipi_dsi_device - DSI peripheral device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @host: DSI host for this peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * @dev: driver model device node for this peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * @name: DSI peripheral chip type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @channel: virtual channel assigned to the peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @format: pixel format for video mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * @lanes: number of active data lanes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @mode_flags: DSI operation mode related flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * be set to the real limits of the hardware, zero is only accepted for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * legacy drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @lp_rate: maximum lane frequency for low power mode in hertz, this should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * be set to the real limits of the hardware, zero is only accepted for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * legacy drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct mipi_dsi_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct mipi_dsi_host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) char name[DSI_DEV_NAME_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) unsigned int lanes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) enum mipi_dsi_pixel_format format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned long mode_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) unsigned long hs_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) unsigned long lp_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline struct mipi_dsi_device *to_mipi_dsi_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return container_of(dev, struct mipi_dsi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * given pixel format defined by the MIPI DSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * @fmt: MIPI DSI pixel format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * Returns: The number of bits per pixel of the given pixel format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) switch (fmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case MIPI_DSI_FMT_RGB888:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) case MIPI_DSI_FMT_RGB666:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) case MIPI_DSI_FMT_RGB666_PACKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) case MIPI_DSI_FMT_RGB565:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct mipi_dsi_device *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) mipi_dsi_device_register_full(struct mipi_dsi_host *host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) const struct mipi_dsi_device_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) void mipi_dsi_device_unregister(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node *np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int mipi_dsi_attach(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) int mipi_dsi_detach(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) const struct drm_dsc_picture_parameter_set *pps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) size_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) size_t num_params, void *data, size_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * information only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * V-Blanking and H-Blanking information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) enum mipi_dsi_dcs_tear_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MIPI_DSI_DCS_TEAR_MODE_VBLANK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define MIPI_DSI_DCS_POWER_MODE_NORMAL (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define MIPI_DSI_DCS_POWER_MODE_SLEEP (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define MIPI_DSI_DCS_POWER_MODE_IDLE (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) const void *data, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) const void *data, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u16 end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u16 end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) enum mipi_dsi_dcs_tear_mode mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u16 brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u16 *brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * struct mipi_dsi_driver - DSI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * @driver: device driver model driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * @probe: callback for device binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * @remove: callback for device unbinding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * @shutdown: called at shutdown time to quiesce the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct mipi_dsi_driver {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct device_driver driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int(*probe)(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) int(*remove)(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) void (*shutdown)(struct mipi_dsi_device *dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static inline struct mipi_dsi_driver *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) to_mipi_dsi_driver(struct device_driver *driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return container_of(driver, struct mipi_dsi_driver, driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static inline void *mipi_dsi_get_drvdata(const struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return dev_get_drvdata(&dsi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static inline void mipi_dsi_set_drvdata(struct mipi_dsi_device *dsi, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) dev_set_drvdata(&dsi->dev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) int mipi_dsi_driver_register_full(struct mipi_dsi_driver *driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct module *owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) void mipi_dsi_driver_unregister(struct mipi_dsi_driver *driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define mipi_dsi_driver_register(driver) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) mipi_dsi_driver_register_full(driver, THIS_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define module_mipi_dsi_driver(__mipi_dsi_driver) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) module_driver(__mipi_dsi_driver, mipi_dsi_driver_register, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) mipi_dsi_driver_unregister)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #endif /* __DRM_MIPI_DSI__ */