Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __ASM_GENERIC_MMIOWB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __ASM_GENERIC_MMIOWB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Generic implementation of mmiowb() tracking for spinlocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * If your architecture doesn't ensure that writes to an I/O peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * within two spinlocked sections on two different CPUs are seen by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * peripheral in the order corresponding to the lock handover, then you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * need to follow these FIVE easy steps:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * 	1. Implement mmiowb() (and arch_mmiowb_state() if you're fancy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  *	   in asm/mmiowb.h, then #include this file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *	2. Ensure your I/O write accessors call mmiowb_set_pending()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *	3. Select ARCH_HAS_MMIOWB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *	4. Untangle the resulting mess of header files
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *	5. Complain to your architects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #ifdef CONFIG_MMIOWB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm-generic/mmiowb_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #ifndef arch_mmiowb_state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define __mmiowb_state()	raw_cpu_ptr(&__mmiowb_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define __mmiowb_state()	arch_mmiowb_state()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif	/* arch_mmiowb_state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static inline void mmiowb_set_pending(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct mmiowb_state *ms = __mmiowb_state();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	if (likely(ms->nesting_count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		ms->mmiowb_pending = ms->nesting_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static inline void mmiowb_spin_lock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	struct mmiowb_state *ms = __mmiowb_state();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	ms->nesting_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static inline void mmiowb_spin_unlock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	struct mmiowb_state *ms = __mmiowb_state();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	if (unlikely(ms->mmiowb_pending)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		ms->mmiowb_pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	ms->nesting_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define mmiowb_set_pending()		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define mmiowb_spin_lock()		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define mmiowb_spin_unlock()		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif	/* CONFIG_MMIOWB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #endif	/* __ASM_GENERIC_MMIOWB_H */